Asynchronous Circuit SEU Correction Without Reset Delays
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Solution Overview
Problem
Existing asynchronous circuits in aviation and spatial applications are vulnerable to single event upsets (SEUs) caused by radiation, leading to malfunctions and requiring either time-consuming resets or increased surface area and power consumption for error correction.
Innovation Solution
An asynchronous circuit design that includes a comparator to detect mismatches between data input and output signals, utilizing non-volatile memory to store values and acknowledgement pause circuits to prevent signal propagation during errors, allowing for error correction without resets and maintaining low surface area and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dual modular redundancy (DMR) is used to detect SEUs, then reliability is improved, but loss of time increases due to circuit reset requirements
Solution Approach 1:
The patent extracts the error correction function from the main processing circuit by implementing a separate correction circuit that operates independently. When an SEU is detected in one module, the correction circuit identifies and corrects the error without requiring a full circuit reset, thus maintaining processing continuity and reducing time loss while preserving reliability through the redundancy mechanism.
2Reliability
If triple modular redundancy (TMR) is used to correct SEUs, then reliability is improved, but use of energy and surface area increase by a factor of three
Solution Approach 1:
The patent segments the redundancy implementation into two distinct parts: (1) dual modular redundancy for error detection, and (2) a separate correction circuit for error correction. This segmentation allows the system to achieve both detection and correction capabilities without duplicating the entire circuit three times, thereby reducing power consumption and surface area compared to full TMR while maintaining reliability through the combined detection-correction approach.
3Reliability
If triple modular redundancy (TMR) is used to correct SEUs, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent extracts the correction functionality from the redundant circuit structure and implements it as a separate, dedicated correction circuit. This extraction simplifies the overall architecture compared to TMR by avoiding the need for three complete functional copies, reducing device complexity while maintaining the ability to detect and correct SEUs through the combination of DMR and the correction mechanism.
Data Source
AI summary
An asynchronous circuit which includes a first circuit suitable for receiving, from a first other circuit, a first data input signal, and for generating a first acknowledgement of receipt signal and a first data output signal; a second circuit suitable for receiving, from a second other circuit, a second data input signal, and for generating a second acknowledgement of receipt signal and a second data output signal, the second circuit being functionally equivalent to the first circuit; a comparator suitable for detecting an inconsistency between the first and second data input or output signals; and at least one circuit for pausing an acknowledgement of receipt suitable for preventing the propagation of the first and second acknowledgement of receipt signals towards the first and second other circuits if an inconsistency is detected by the comparator.