Asynchronous Counter Switching for Faster CMOS Image Sensor ADC
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Solution Overview
Problem
Conventional solid-state imaging devices face limitations in AD conversion frequency due to increased carry propagation delay and noise generation when switching between up-counting and down-counting modes, which affects image quality and frame rate.
Innovation Solution
The implementation of an asynchronous counter with up-counting, down-counting, and holding modes, utilizing first and second switching units to manage flip-flop operations outside the carry propagation path, allowing seamless switching without bit inversion and reducing carry propagation delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional asynchronous counters switch between up-counting and down-counting modes, then AD conversion can be performed, but carry propagation delay increases and AD conversion frequency is limited
Solution Approach 1:
The patent extracts the mode switching functionality from the carry propagation path by introducing separate first and second switching units that operate independently. The first switching unit switches the counting direction (up/down) while the second switching unit handles mode transitions, removing the switching operations from the critical carry propagation path and thereby reducing delay.
Solution Approach 2:
The patent introduces switching units as intermediary components that mediate between the counter stages and the control logic. These switching units act as buffers that isolate the carry propagation path from the mode switching operations, allowing frequent mode changes without affecting the speed of carry propagation through the counter.
2Measurement precision
If conventional asynchronous counters switch between up-counting and down-counting modes, then AD conversion can be performed, but noise is generated and affects image quality
Solution Approach 1:
The patent extracts the noise-generating switching operations from the main counter operation by using dedicated switching units (first and second switching units) that handle mode transitions separately. This separation reduces electrical noise and signal interference that would otherwise be generated during frequent mode switching in the counter circuit.
3Productivity
If conventional asynchronous counters switch modes, then AD conversion can proceed, but bit inversion occurs and requires additional correction operations
Solution Approach 1:
The patent extracts the bit inversion problem from the counting operation by using separate switching units that control the counting direction without causing unwanted bit inversions. The first switching unit manages the up/down counting direction while the second switching unit handles mode transitions, preventing the bit inversion issues that would require correction operations.
Data Source
AI summary
It is an object of the present invention to provide a solid-state imaging device for enhancing accuracy of AD conversion and active switching of up-counting and down-counting in the asynchronous counter without limiting the AD conversion frequency. The solid-state imaging device according to the present invention includes an asynchronous counter having an up-counting mode in which up-counting is performed, a down-counting mode in which down-counting is performed, and a holding mode for switching operation settings between the up-counting and the down-counting while maintaining a count value held in the asynchronous counter.