Asynchronous FPGA Conversion Using Multi-Wire Interconnects
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Solution Overview
Problem
The industry faces challenges in effectively converting synchronous circuit designs to asynchronous designs without major redesigns or conversion design flaws, particularly due to the complexity of interconnect architecture required for asynchronous token verification protocols.
Innovation Solution
A systematic method and system for converting synchronous circuit designs to asynchronous dataflow implementations, preserving logical primitives and allowing the same synthesis algorithms to be used, with the conversion process involving the replacement of synchronous wires and switches with multi-wire tracks and programmable switch points to support asynchronous communication protocols.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If synchronous circuit designs are converted to asynchronous designs, then the benefits of asynchronous operation (such as improved power efficiency and scalability) are achieved, but the complexity of interconnect architecture increases due to the need for token verification protocols
Solution Approach 1:
The patent introduces completion detection circuits as intermediary components that mediate between the asynchronous logic blocks and the interconnect structure. These circuits verify token completion status and enable simplified interconnect routing by handling the verification protocol locally rather than requiring complex global verification infrastructure.
Solution Approach 2:
The interconnect architecture is segmented into modular components including routing tracks, switch boxes, and completion detection circuits that can be independently configured. This segmentation allows the system to achieve asynchronous operation with reduced overall complexity by distributing verification functions across multiple independent segments rather than requiring a monolithic complex interconnect structure.
2Reliability
If synchronous wires and switches are replaced with multi-wire tracks and programmable switch points for asynchronous operation, then functional equivalence is maintained, but the device complexity increases
Solution Approach 1:
The programmable switch points and multi-wire tracks are designed to serve multiple functions: they handle both data routing and completion verification, support both synchronous and asynchronous operation modes, and can be reconfigured for different logic block connections. This multi-functionality maintains functional equivalence while reducing the need for separate dedicated structures for each function.
Solution Approach 2:
The system utilizes reconfigurable parameters in the programmable logic blocks and switch points to adapt the interconnect structure for asynchronous operation. By changing configuration parameters rather than physical structure, the system maintains functional equivalence across different operating modes without permanently increasing device complexity.
Data Source
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AI summary
Methods and systems for converting synchronous circuit designs to asynchronous circuit designs, and particularly programmable asynchronous circuit designs. Provide is a systematic, workable and repeatable process for evaluating synchronous circuit designs, converting the wires, switches/connections and logic functions to equivalent-function asynchronous circuit designs and hence implementing a functionally equivalent asynchronous circuit with all the benefits thereof. Further provided are a process for systematically doing the conversion and hardware equivalents (in form or functional description) for the asynchronous components. Using the present invention, any synchronous circuit design can be converted to an asynchronous equivalent, typically with no change to the original design implementation.