Asynchronous Majority-Gate Networks for Low-Voltage Logic
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Solution Overview
Problem
Traditional asynchronous circuits require high power supply levels due to the series stacking of transistors, making them unsuitable for low power operation and resulting in larger area and lower throughput compared to synchronous circuits.
Innovation Solution
The implementation of threshold gates and majority/minority gates reduces the stack size of pull-up and pull-down networks, allowing asynchronous circuits to operate at lower power supply levels, achieve area reduction, and enhance throughput by using capacitive input circuits with linear or non-linear dielectric materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional series stacking of transistors is used in asynchronous circuits, then the circuit can be implemented with conventional logic, but the power supply level required increases and the area increases
Solution Approach 1:
The patent changes the fundamental parameter of transistor stacking from series to parallel configuration. By using parallel stacking of transistors in pull-up and pull-down networks controlled by majority or minority gates, the circuit achieves low power operation at supply levels below 1V while maintaining conventional logic functionality. This parameter change resolves the contradiction by decoupling the implementation ease from the power consumption constraint.
2Ease of manufacture
If traditional series stacking of transistors is used in asynchronous circuits, then the circuit can be implemented with conventional logic, but the area increases
Solution Approach 1:
The patent transforms the spatial arrangement parameter from series to parallel transistor stacking. This configuration change reduces the area required for the same logic functionality by approximately 3 times compared to traditional series stacking, while preserving the ability to implement conventional logic operations through majority and minority gate designs.
3Device complexity
If traditional series stacking of transistors is used in asynchronous circuits, then the circuit structure is simple, but the throughput decreases
Solution Approach 1:
The patent segments the transistor network into distinct pull-up and pull-down sections with parallel transistor stacks, each controlled by majority or minority gates. This segmentation enables independent operation of logic paths, increasing throughput by up to 2 times compared to traditional series configurations, while the overall structure remains relatively simple and manageable.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables asynchronous circuits to operate at lower power supply levels, reduce area by up to 3 times, and increase throughput by up to 2 times compared to traditional asynchronous circuits, while also allowing integration in synchronous circuits.
Implementation Method 1
allowing asynchronous circuits to operate at lower power supply levels, achieve area reduction, and enhance throughput by using capacitive input circuits with linear or non-linear dielectric materials
Data Source
AI summary
Asynchronous circuits implemented using threshold gate(s) and/or majority gate(s) (or minority gate(s)) are described. The new class of asynchronous circuits can operate at lower power supply levels (e.g., less than 1V on advanced technology nodes) because stack of devices between a supply node and ground are significantly reduced compared to traditional asynchronous circuits. The asynchronous circuits here result in area reduction (e.g., 3× reduction compared to traditional asynchronous circuits) and provide higher throughput/mm2 (e.g., 2× higher throughput compared to traditional asynchronous circuits). The threshold gate(s), majority/minority gate(s) can be implemented using capacitive input circuits. The capacitors can have linear dielectric or non-linear polar material as dielectric.