Asynchronous Memory-Plane Control with Dedicated State Machines
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Solution Overview
Problem
The serial processing of control commands for different memory planes in semiconductor memory devices results in a slow overall processing rate and redundant waiting time, leading to low access efficiency.
Innovation Solution
Implementing a memory device with a peripheral circuit containing multiple state machines, each corresponding to a memory plane, allowing parallel processing of control commands and asynchronous operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If control commands for different memory planes are processed serially to avoid resource conflicts, then resource conflicts are avoided, but the overall processing rate decreases and redundant waiting time increases
Solution Approach 1:
The control logic is segmented into multiple independent state machines, with each state machine dedicated to processing control commands for a specific memory plane. This segmentation allows parallel processing of control commands across different memory planes while maintaining resource isolation, thereby resolving the contradiction between avoiding resource conflicts and maintaining high processing rates
Solution Approach 2:
The patent transitions from one-dimensional serial processing to multi-dimensional parallel processing by introducing multiple state machines that operate simultaneously on different memory planes. This dimensional expansion enables concurrent command processing while maintaining proper resource management through dedicated state machine assignments
2Reliability
If control commands for different memory planes are processed serially, then resource conflicts are avoided, but redundant waiting time increases
Solution Approach 1:
By dividing the control logic into multiple independent state machines, each handling specific memory plane commands, the system eliminates waiting time caused by serial processing while maintaining resource conflict avoidance through dedicated state machine assignments for each plane
Solution Approach 2:
The multiple state machines enable continuous processing of control commands across different memory planes without idle waiting periods. Each state machine continuously processes commands for its assigned memory plane, eliminating the redundant waiting time that occurs in serial processing while maintaining proper resource management
Data Source
AI summary
A memory device, a method for controlling the memory device, and a memory system are provided. The memory device includes a memory array comprising a plurality of memory planes, and a peripheral circuit configured to control the plurality of memory planes to perform asynchronous operations. The peripheral circuit comprises a plurality of state machines connected to a memory interface of the memory device. Each state machine is configured to associated with one or more assigned memory planes of the plurality of memory planes. Each state machine is further configure to receive, from the memory interface in parallel with other state machines, a corresponding sequence of control commands of the one or more assigned memory planes; and independently process the corresponding sequence of control commands to obtain control information of the one or more assigned memory planes.