Asynchronous MOSFET Protection Circuit for Parasitic Suppression

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Power integrated circuits (ICs) face parasitic interference issues during start-up and transient conditions, particularly when both reverse battery protection and reverse current protection features coexist, leading to malfunctions or aberrations due to parasitic path interactions with power MOSFETs, which are not adequately addressed by existing technologies.

Innovation Solution

Implementing an asynchronous gate drive mechanism using two MOSFETs operated at different clock frequencies or with staggered enable signals to prevent the formation of parasitic devices by controlling the timing of MOSFET activation, ensuring one MOSFET is activated before the other, thereby preventing the formation of parasitic bipolar junction transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If both reverse battery protection and reverse current protection features are implemented in a power IC, then the reliability and protection capability are improved, but parasitic path interactions occur during start-up and transient conditions causing malfunctions

Engineering Contradiction:
Improveprotection capabilityVSAvoidparasitic interference
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by activating the first MOSFET before the second MOSFET during start-up. This sequential activation ensures that the first MOSFET is already conducting when the second MOSFET turns on, preventing the simultaneous off-state that would create parasitic paths. The gate drive circuitry is designed to provide this timing sequence, with the first MOSFET's gate receiving the enable signal before the second MOSFET's gate.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements dynamics by using asynchronous gate drive signals with different timing characteristics for the two MOSFETs. The gate drive circuitry dynamically controls the turn-on and turn-off sequences, ensuring that during transient conditions, the MOSFETs are never simultaneously off. This dynamic control adapts to varying operating conditions while maintaining protection against parasitic interference.

Inventive Principle:
Principle #15Dynamics

2Speed

If MOSFETs are activated simultaneously for protection functionality, then the protection response is fast, but parasitic bipolar junction transistors form causing circuit malfunction

Engineering Contradiction:
Improveprotection response speedVSAvoidparasitic device formation
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary action by ensuring the first MOSFET is activated before the second MOSFET. The gate drive circuitry is configured to provide the enable signal to the first MOSFET's gate prior to the second MOSFET's gate, creating a time sequence where the first MOSFET is already conducting when the second MOSFET turns on. This prevents the formation of parasitic bipolar junction transistors that would occur if both MOSFETs were simultaneously off.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements asymmetry by using unequal timing sequences for activating the two MOSFETs. The gate drive circuitry provides different timing characteristics to each MOSFET, with the first MOSFET receiving the enable signal at a different time than the second MOSFET. This asymmetric timing prevents simultaneous off-states while maintaining fast overall protection response.

Inventive Principle:
Principle #4Asymmetry

3Reliability

If staggered MOSFET activation is implemented to prevent parasitic devices, then parasitic interference is suppressed, but the control circuit complexity increases

Engineering Contradiction:
Improveparasitic suppressionVSAvoidgate drive control
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies merging by integrating the timing control functionality directly into the existing gate drive circuitry. Rather than adding separate control circuits, the enable signal is distributed to the MOSFET gates through the existing gate drive structure, with timing differences achieved through inherent circuit characteristics. This combines the protection logic with the existing drive circuitry, minimizing additional complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements self-service by designing the gate drive circuitry to automatically provide the correct timing sequence without external intervention. The circuit inherently generates the staggered activation signals through its internal configuration, eliminating the need for complex external control logic or additional timing components. The protection mechanism is self-regulating through the circuit's natural behavior.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12587011B2Substrate parasite reduction technique
Publication Date: 2026.03.24 SEMICON COMPONENTS IND LLC
  • US12587011B2 patent drawing
  • US12587011B2 patent drawing
  • US12587011B2 patent drawing

AI summary

A protection circuit is disclosed for use in automotive or industrial high power integrated circuits equipped with reverse battery protection and reverse current protection. The protection circuit prevents formation of parasitic devices that could cause the high power integrated circuit to malfunction or fail to turn on. The protection circuit features asynchronous operation of a pair of MOSFETs coupled between a power supply and a load. The protection circuit can be engaged at start-up or in response to transient conditions associated with a fault.