Asynchronous Peak Detector Logic for Spectroscopy Signal Processing
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Solution Overview
Problem
Existing signal processing electronics for multi-element sensors are costly, complex, and inefficient in processing high-rate pulse signals, leading to deadtime and poor handling of random rate fluctuations.
Innovation Solution
A signal processing device with trigger comparators, peak detectors, and logic circuits that asynchronously select and connect channels to peak detectors based on pulse amplitude, allowing efficient derandomization, processing, and digitization of pulses from multiple detector elements without the need for multiple sample-and-hold circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If N fast analog-to-digital converters (ADCs) are used to directly digitize signals from N detector elements, then signal processing accuracy is improved, but cost and power dissipation increase significantly
Solution Approach 1:
The patent merges multiple detector channels into a smaller number of ADCs by using sample-and-hold circuits to capture and store signal samples, then multiplexing these samples to fewer conversion channels. This combining approach maintains measurement precision while significantly reducing the number of ADCs required, thereby lowering cost and power dissipation.
Solution Approach 2:
The sample-and-hold circuits perform preliminary sampling and holding of the detector signals before digitization. By capturing the signal peaks in advance and storing them temporarily, the system prepares the data for efficient batch processing by the ADCs, enabling accurate measurement without requiring one ADC per detector element.
2Device complexity
If sample-and-hold (S/H) circuits are used to sample and multiplex data into fewer ADCs, then cost is reduced, but deadtime increases because circuits must remain in hold mode until all channels complete digitization
Solution Approach 1:
The patent implements dynamic channel allocation where S/H circuits can be dynamically released from hold mode once their data has been transferred to the ADC. Instead of forcing all channels to wait for the slowest channel, the system dynamically manages which channels are actively sampling versus which are in hold mode, minimizing the time channels spend idle and reducing overall deadtime.
Solution Approach 2:
The system maintains continuous useful action by ensuring that while some S/H circuits are in hold mode, other circuits are actively sampling new incoming signals. The asynchronous operation allows overlapping of sampling activities across different channels, so that the system as a whole continues to process signals continuously without complete idle periods.
3Ease of operation
If all S/H circuits are put into hold mode by a trigger signal, then synchronization is simplified, but channels that are not busy are unnecessarily held, reducing productivity
Solution Approach 1:
The patent applies local quality control by allowing each S/H circuit to independently determine when to enter and exit hold mode based on its own busy status rather than forcing a global hold state. Each channel can be in hold mode only when necessary, while other channels continue normal operation. This localized control maintains synchronization where needed while preserving productivity in channels that don't require holding.
4Speed
If the multiplexer and ADC are made fast enough to respond to maximum pulse rates, then rate capability is improved, but they remain idle during periods of low rate, increasing loss of energy
Solution Approach 1:
The patent employs periodic sampling and batch processing where the ADC converts multiple sampled channels in sequence rather than continuously processing each channel individually in real-time. This periodic operation allows the ADC to work at high speed during active conversion periods while allowing idle S/H circuits to consume minimal power during their hold periods, reducing overall energy waste while maintaining rate capability.
Data Source
AI summary
A method for processing pulses arriving randomly in time on at least one channel using multiple peak detectors includes asynchronously selecting a non-busy peak detector (PD) in response to a pulse-generated trigger signal, connecting the channel to the selected PD in response to the trigger signal, and detecting a pulse peak amplitude. Amplitude and time of arrival data are output in first-in first-out (FIFO) sequence. An apparatus includes trigger comparators to generate the trigger signal for the pulse-receiving channel, PDs, a switch for connecting the channel to the selected PD, and logic circuitry which maintains the write pointer. Also included, time-to-amplitude converters (TACs) convert time of arrival to analog voltage and an analog multiplexer provides FIFO output. A multi-element sensor system for spectroscopy includes detector elements, channels, trigger comparators, PDs, a switch, and a logic circuit with asynchronous write pointer. The system includes TACs, a multiplexer and analog-to-digital converter.