Asynchronous PUF Validity Detection to Minimize Blind Zones
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Solution Overview
Problem
Conventional security devices with physical unclonable functions (PUFs) suffer from a blind zone in validity detection due to synchronous configurations, where transitions in digital random signals are not detectable during periods when the synchronous clock is deactivated.
Innovation Solution
The implementation of an asynchronous configuration for the security device, which minimizes the blind zone by limiting the period when the reset signal is logic '1, and utilizes multiple entropy sources and digitizers to generate and validate digital random signals, thereby reducing the area required for the security device and enhancing entropy value.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a synchronous configuration is used for validity detection, then the detection mechanism is simple to implement, but a blind zone is generated every cycle when the synchronous clock is deactivated
Solution Approach 1:
The patent inverts the conventional synchronous detection approach by using asynchronous detection. Instead of relying on a synchronous clock to enable detection, the invention detects transitions asynchronously and uses a reset signal to manage the detection state, thereby eliminating the blind zone problem inherent in synchronous configurations
Solution Approach 2:
The patent changes the operational parameter from synchronous clock-driven detection to asynchronous detection with reset signal control. By changing the detection mechanism from clock-synchronized to event-driven with explicit reset management, the blind zone is minimized to only the reset period
2Reliability
If multiple entropy sources and digitizers are used to increase entropy value, then the security strength is improved, but the area of the die required for implementation increases
Solution Approach 1:
The patent merges multiple entropy sources and digitizers into a unified PUF structure where they share common validation logic and output processing. By combining these components into an integrated system rather than separate independent units, the total die area is reduced while maintaining the enhanced security strength provided by multiple entropy sources
Solution Approach 2:
The patent implements multi-functional components that serve multiple purposes. The validation unit, for example, validates outputs from multiple entropy sources and digitizers simultaneously, and the output processing logic handles signals from various PUF configurations. This universality reduces the need for duplicate dedicated circuits for each entropy source, thereby reducing overall die area
Data Source
AI summary
The inventive concept provides a security device capable of reducing an area of a die required for implementation of a stable PUF by increasing the value of entropy from a predefined number of entropy sources and/or minimizing a blind zone of a validity checking module. The security device uses an asynchronous configuration to minimize a blind zone.In various embodiments of the inventive concept, the blind zone is generated only in a period when a reset signal is at a first logic level. Therefore, it is possible to minimize the blind zone by minimizing a period in which the reset signal is at such logic level. A semiconductor device, semiconductor package, and/or smart card can be provided with such security device, as well as a method for determining a validity of a random signal using a semiconductor security device.