Asynchronous Sample Rate Conversion Using Zero-Padded Interpolation

Solution Overview

Problem

Converting digital signals at asynchronous sample rates between two devices poses substantial challenges due to the need for large amounts of circuitry and memory, making existing solutions impractical for applications with stringent size requirements.

Innovation Solution

The use of a zero-padding circuit to virtually add zeroes to the input signal, followed by a transposed polynomial filter and decimation, eliminating the need for interpolation and reducing memory and computational requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional interpolation methods are used for asynchronous sample rate conversion, then signal conversion accuracy is improved, but memory requirements and circuit complexity increase substantially

Engineering Contradiction:

Improvesignal conversion accuracyVSAvoidcircuit complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the interpolation step from the traditional asynchronous sample rate conversion process. By using a zero-padding circuit followed directly by a decimating filter, the invention removes the complex interpolation circuitry while maintaining conversion functionality, thereby reducing device complexity without sacrificing signal conversion accuracy

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The invention changes the fundamental parameters of the signal processing approach by replacing interpolation with zero-padding. This parameter change transforms the method from one requiring complex calculations to one using simple zero-value insertion, significantly reducing circuit complexity while preserving the essential function of asynchronous sample rate conversion

Inventive Principle:

Principle #35Parameter changes

2Measurement precision

If traditional interpolation methods are used for asynchronous sample rate conversion, then signal conversion accuracy is improved, but memory requirements increase substantially

Engineering Contradiction:

Improvesignal conversion accuracyVSAvoidmemory requirements

Core Design Contradiction:

Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent extracts and eliminates the interpolation step from the traditional asynchronous sample rate conversion process. By using a zero-padding circuit followed directly by a decimating filter, the invention removes the complex interpolation circuitry while maintaining conversion functionality, thereby reducing device complexity without sacrificing signal conversion accuracy

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The invention changes the fundamental parameters of the signal processing approach by replacing interpolation with zero-padding. This parameter change transforms the method from one requiring complex calculations to one using simple zero-value insertion, significantly reducing circuit complexity while preserving the essential function of asynchronous sample rate conversion

Inventive Principle:

Principle #35Parameter changes

3Productivity

If traditional interpolation methods are used for asynchronous sample rate conversion, then signal processing capability is improved, but computational requirements increase substantially

Engineering Contradiction:

Improvesignal processing capabilityVSAvoidcomputational requirements

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent replaces expensive, computationally intensive interpolation operations with cheap, simple zero-padding operations. The zero-padding circuit uses minimal computational resources compared to traditional interpolation methods, significantly reducing energy consumption while maintaining the essential signal conversion capability

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The invention changes the fundamental parameters of the signal processing approach by replacing interpolation with zero-padding. This parameter change transforms the method from one requiring complex calculations to one using simple zero-value insertion, significantly reducing circuit complexity while preserving the essential function of asynchronous sample rate conversion

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS12556163B2System and methods for asynchronous signal interpolation

Publication Date: 2026.02.17 SKYWORKS SOLUTIONS INC

AI summary

Aspects of this disclosure relate to an asynchronous sample rate converter (ASRC) comprising a signal input configured to receive an input signal having one or more input signal values at a first sample rate, a first clock input configured to receive an input clock signal corresponding to the first sample rate, a signal output configured to provide an output signal having one or more output signal values at a second sample rate, a second clock input configured to receive an output clock signal corresponding to the second sample rate, a zero-padding circuit configured to add a plurality of zero values following at least one of the one or more input signal values, and a filter configured to generate the output signal, the output signal having one or more output signal values based on the input signal.