Asynchronous Serial Communication Circuit With Temperature Compensation
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Solution Overview
Problem
Asynchronous serial data communication systems with start-stop synchronous type face communication failures due to significant frequency deviations between the transmitting and receiving sides, especially when the frequency difference exceeds 5%, leading to improper data transfer.
Innovation Solution
A sensor module with a clock signal generator that stores temperature characteristics of the clock signal frequency in a non-volatile memory, allowing a host device to adjust its clock signal frequency based on these characteristics to maintain synchronization, thereby reducing the need for high-accuracy clock generators and minimizing circuit size and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the frequency of the clock signal generated by the transmitting side and the receiving side are kept within 5% deviation, then proper data communication is achieved, but high-accuracy clock generators are required which increase circuit size and power consumption
Solution Approach 1:
The patent changes the operating parameters of the clock signal generator by allowing frequency deviation beyond the conventional 5% limit. By implementing compensation mechanisms for timing errors that occur with larger frequency deviations, the system achieves reliable communication without requiring high-accuracy (low deviation) clock generators, thus reducing circuit size and power consumption.
Solution Approach 2:
The patent employs feedback mechanisms to detect and compensate for timing errors caused by frequency deviations between transmitting and receiving sides. By continuously monitoring communication reliability and adjusting timing parameters based on feedback, the system maintains proper data communication even with lower-accuracy clock generators.
2Reliability
If the frequency of the clock signal generated by the transmitting side and the receiving side are kept within 5% deviation, then proper data communication is achieved, but power consumption increases due to high-accuracy clock generators
Solution Approach 1:
The patent allows clock signal frequency deviation to exceed the conventional 5% limit, thereby enabling the use of lower-power, lower-accuracy clock generators. Compensation techniques for the resulting timing errors ensure that data communication reliability is maintained despite the relaxed frequency accuracy requirements.
Solution Approach 2:
The system uses feedback to detect timing errors caused by frequency deviations and applies corrections to maintain communication reliability. This feedback mechanism enables the use of energy-efficient clock generators that would otherwise produce unacceptable timing errors.
3Ease of operation
If start-stop synchronous communication is used with 8-bit character data, then data transmission is performed with start and stop bits, but communication fails when frequency deviation exceeds 5%
Solution Approach 1:
The patent modifies the frequency deviation parameter to allow values exceeding 5%, which breaks the limitation of conventional start-stop synchronous communication. By implementing compensation mechanisms for the resulting timing errors, the system achieves both simple operation (maintaining start-stop format) and high reliability (overcoming frequency deviation limitations).
Data Source
AI summary
An asynchronous serial data communication circuit includes a clock signal generator configured to generate a clock signal, a storage configured to store the temperature characteristics of the frequency of the clock signal in a non-volatile manner, and a communicator configured to perform asynchronous serial data communication based on the clock signal and to transmit the temperature characteristics of the frequency of the clock signal stored in the storage.