Asynchronous Switch Mode Power Supply Delta-Sigma Control

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Solution Overview

Problem

Existing switch mode power supplies rely on synchronous operations, which limit the resolution and accuracy of voltage control, especially in asynchronous systems where external clock signals are not available, leading to inefficiencies in power conversion.

Innovation Solution

An asynchronous switch mode power supply is designed with a subtractor, filter, and quantiser that generates multiple quantiser outputs based on the integrated error signal, using comparators with feedback loops and combiners to connect appropriate supply voltages to the output, enabling delta-sigma modulation without external clock signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If synchronous operation with external clock signals is used, then the switching operation is coordinated and stable, but the resolution and accuracy of voltage control are limited

Engineering Contradiction:
Improvevoltage control resolutionVSAvoidclock signal synchronization requirement
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent removes the external clock signal requirement from the system, enabling asynchronous operation. The quantiser generates its own switching signals based on the integrated error signal, eliminating the need for external clock synchronization while improving voltage control resolution through multi-level quantisation.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The system transitions from fixed synchronous switching to dynamic asynchronous switching. The switching frequency and timing are dynamically determined by the quantiser based on the instantaneous error signal, allowing the system to adapt to varying load conditions and improve control accuracy without external clock constraints.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If multi-phase clock signals are used for synchronous control, then finer phase/amplitude resolution is achieved, but the system complexity increases

Engineering Contradiction:
Improvephase/amplitude resolutionVSAvoidmulti-phase clock signal requirement
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the voltage control into multiple discrete levels using the quantiser, which compares the integrated error signal against multiple reference thresholds. This creates multiple quantiser output levels that control the switching stage, achieving fine resolution without requiring multiple clock phases.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system uses multiple comparators that each copy the same integrated error signal input but compare it against different reference voltage levels. This creates multiple quantiser outputs from a single integrated signal, achieving multi-level control without the complexity of multi-phase clocks.

Inventive Principle:
Principle #26Copying

3Power

If large switching devices are used in the power switch stage, then the power handling capability is sufficient, but the delay caused by switching is increased

Engineering Contradiction:
Improvepower handling capabilityVSAvoidswitching delay
Core Design Contradiction:
PowerVSLoss of time

Solution Approach 1:

The system performs preliminary integration and quantisation of the error signal before the power switching stage. The quantiser outputs provide advance control signals that prepare the switching stage for the required voltage level changes, reducing the reactive delay of large switching devices by having the control decision made in advance based on the integrated error.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP2730024B1Asynchronous switch mode supply
Publication Date: 2017.10.18 SNAPTRACK INC
  • EP2730024B1 patent drawing
  • EP2730024B1 patent drawing
  • EP2730024B1 patent drawing

AI summary

There is disclosed an asynchronous switch mode power supply comprising: a subtractor for subtracting an output of the switch mode power supply from a reference signal; a filter for filtering the subtracted output; a quantiser for generating a plurality of quantiser outputs in dependence on the integrated subtracted output; and a power switch stage for connecting one of a plurality of supply voltages to the output of the switch mode power supply in dependence on the quantiser outputs.