Asynchronous Circuit Voltage Regulation for Process-Variation Tolerance
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Solution Overview
Problem
Conventional synchronous digital circuits face challenges in adapting to process variations and environmental changes due to fixed clock frequencies, leading to inefficiencies and increased power consumption, while asynchronous circuits lack automated design flows for provably correct synthesis.
Innovation Solution
The development of a fully automated design flow for generating asynchronous circuits using variability-aware local controllers implementing two-phase protocols, which allows for dynamic voltage adjustment and synchronization through request and acknowledge signals, enabling efficient power management and robustness against variability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If synchronous circuits use fixed clock frequencies to ensure correct operation, then reliability is improved, but power consumption increases and adaptability to process variations deteriorates
Solution Approach 1:
The patent implements dynamic voltage regulation in asynchronous circuits by adjusting the voltage supply to individual circuits based on their actual operational needs and timing requirements. This allows the circuit to operate at lower voltages when possible, reducing power consumption while maintaining correct operation through adaptive timing adjustment rather than fixed high-frequency clocking.
Solution Approach 2:
The patent changes the operating parameters of circuits by dynamically adjusting voltage levels and timing characteristics based on process variations and environmental conditions. This enables the circuit to adapt to different operating conditions without requiring a fixed conservative clock frequency, thereby reducing power consumption while maintaining reliability.
2Reliability
If synchronous circuits use fixed clock frequencies to ensure correct operation, then reliability is improved, but adaptability to process variations deteriorates
Solution Approach 1:
The patent implements self-adjusting timing mechanisms in asynchronous circuits where each circuit independently regulates its own operation based on its actual delay characteristics. The circuits automatically adapt to process variations by adjusting their timing and voltage levels without external intervention, enabling the system to maintain correct operation across diverse process conditions without conservative fixed-frequency design.
3Reliability
If asynchronous circuits are designed manually to achieve correct timing, then reliability is improved, but device complexity and design difficulty increase
Solution Approach 1:
The patent implements automated design flows with feedback mechanisms that iteratively optimize asynchronous circuit timing. The system uses timing analysis and adjustment feedback to automatically generate correct timing designs without manual intervention, reducing design complexity while ensuring reliable operation through algorithmic optimization rather than manual tuning.
Solution Approach 2:
The patent performs preliminary automated timing analysis and optimization during the design phase, generating pre-configured asynchronous circuits with correct timing characteristics. This preliminary automated action eliminates the need for complex manual timing adjustments later, reducing overall design complexity while ensuring correct timing behavior.
4Reliability
If synchronous circuits use conservative clock frequencies to accommodate worst-case delays, then reliability is improved, but productivity decreases
Solution Approach 1:
The patent enables dynamic timing adjustment in asynchronous circuits, allowing each circuit to operate at its actual maximum speed rather than a conservative fixed frequency. Circuits can dynamically adapt their operating speed based on real-time conditions, achieving higher average productivity while maintaining reliability through adaptive timing control rather than fixed conservative clocking.
Data Source
AI summary
A system for automatically transforming a given synchronous circuit description into an equivalent and provably correct desynchronized circuit description. Included in the automated transformation are techniques for synthesizing a variability-aware controller using a two-phase protocol, techniques for synthesizing a variability-aware controller using gated clocks and testability circuits, techniques for synthesizing a variability-aware controller optimized for performance, techniques for initializing the synthesized controller, techniques for dynamically minimizing power requirements, and techniques for interfacing the desynchronized circuit with external synchronous circuits. Also disclosed are techniques for implementing a system for automatically transforming a synchronous circuit description into an equivalent and provably correct desynchronized circuit description within the context of an electronic design automation design flow. Exemplary circuits used in the application of the aforementioned techniques are provided. Application of mathematical models and techniques used for proving equivalence between the input description and the resulting desynchronized circuit are presented and explained.