Multi-Stage Equalization for ATE Signal Jitter Reduction

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Solution Overview

Problem

Automatic Test Equipment (ATE) systems face challenges in providing accurate test signals due to jitter introduced by drivers in the signal transmission process, which affects the quality of testing for devices under test (DUT).

Innovation Solution

A multi-stage equalization system is implemented, where each stage comprises a driver and a filter configured to reduce jitter, with filters customized to correct for the specific type and magnitude of jitter produced by preceding drivers, ensuring better quality test signals are transmitted to the DUT.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If multiple driver stages are used to transmit test signals, then signal transmission capability is improved, but jitter is introduced that degrades test signal quality

Engineering Contradiction:
Improvesignal transmission capabilityVSAvoidtest signal quality
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

Filters are introduced as intermediary components between driver stages to mediate the signal transmission. Each filter removes jitter introduced by the preceding driver while allowing the signal to pass through, thus enabling multiple driver stages to work together without compounding jitter degradation

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The jitter introduced by each driver stage is converted from a harmful effect into a correctable distortion. By characterizing the jitter properties of each driver and designing filters specifically tailored to compensate for these distortions, the harmful jitter is transformed into manageable signal characteristics that can be corrected

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Reliability

If filters are added between driver stages to reduce jitter, then test signal quality is improved, but system complexity increases

Engineering Contradiction:
Improvetest signal qualityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The equalization function is segmented into multiple discrete filter stages, each handling a specific portion of the jitter correction task. This segmentation allows each filter to be optimized for its specific function while maintaining overall system manageability and enabling modular design

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Filter characteristics such as cutoff frequencies, Q-factors, and transfer functions are adjusted as variables to optimize jitter reduction performance. By treating filter parameters as可调 variables rather than fixed values, the system achieves improved signal quality while maintaining design flexibility to manage complexity

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If jitter is not corrected, then system simplicity is maintained, but measurement precision deteriorates

Engineering Contradiction:
Improvesystem simplicityVSAvoidtesting accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

Jitter correction is performed in advance before the signal reaches the device under test. By pre-equalizing the test signal through filter stages that compensate for anticipated jitter, the measurement is performed on a cleaned signal, thereby preserving measurement precision without requiring complex real-time correction during testing

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9772378B2Multi-stage equalization
Publication Date: 2017.09.26 TERADYNE INC
  • US9772378B2 patent drawing
  • US9772378B2 patent drawing
  • US9772378B2 patent drawing

AI summary

An example apparatus for interfacing between automatic test equipment (ATE) and a device under test (DUT) includes: multiple stages arranged in sequence between the ATE and the DUT, where each of the multiple stages includes a driver, at least two of the multiple stages each includes a filter, each filter is arranged between two drivers, and each filter is configured to reduce jitter produced by a preceding driver in a signal transmitted between the ATE and the DUT.