Adjacent Track Interference Metric for Magnetic Storage Refresh

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Solution Overview

Problem

In magnetic storage systems, adjacent track interference causes data distortion due to repeated write operations, leading to degradation and potential loss of data integrity.

Innovation Solution

A data processing system that calculates an adjacent track interference metric using error signals from long magnet bits, comparing it to a threshold value to determine when data sectors need to be refreshed before they become distorted.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If adjacent track write operations are performed repeatedly, then storage capacity and write flexibility are improved, but data integrity deteriorates due to adjacent track interference

Engineering Contradiction:
Improvewrite flexibilityVSAvoiddata integrity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The system performs preliminary detection of adjacent track interference by calculating an interference metric based on long magnet bit errors before data distortion becomes severe. When the metric exceeds a threshold, the system proactively refreshes the affected data sector, preventing data integrity loss while allowing flexible write operations to proceed

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system establishes a feedback mechanism that continuously monitors data quality by calculating adjacent track interference metrics from read signals. The metric comparison with thresholds provides feedback that triggers conditional refresh operations, creating a closed-loop system that maintains data integrity while permitting aggressive write patterns

Inventive Principle:
Principle #23Feedback

2Reliability

If data sectors are refreshed frequently, then data integrity is maintained, but system performance and productivity deteriorate due to additional write operations

Engineering Contradiction:
Improvedata integrityVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system applies local quality by selectively refreshing only those data sectors that exhibit adjacent track interference above a threshold, rather than performing blanket refreshes across the entire storage medium. This targeted approach maintains data integrity for affected sectors while minimizing unnecessary write operations on healthy data

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system uses parameter changes by establishing multiple thresholds (first threshold for refresh, second threshold for data distortion detection) that dynamically control refresh behavior. The interference metric comparison against these parameters enables adaptive refresh frequency that maintains reliability while optimizing performance

Inventive Principle:
Principle #35Parameter changes

3Productivity

If adjacent track interference is detected late, then write operations can proceed without interruption, but data distortion occurs requiring costly recovery operations

Engineering Contradiction:
Improvewrite operation continuityVSAvoiddata quality
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The system performs preliminary detection of adjacent track interference by calculating an interference metric from long magnet bit errors in read signals. By detecting interference before it causes severe data distortion (using a first threshold lower than the distortion threshold), the system can proactively refresh data and prevent quality loss while maintaining write operation continuity

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8861109B1Data processing system with adjacent track interference metric
Publication Date: 2014.10.14 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8861109B1 patent drawing
  • US8861109B1 patent drawing
  • US8861109B1 patent drawing

AI summary

A data processing circuit includes a long magnet identification circuit operable to identify long magnet bits in data to be processed, the long magnet bits comprising bits having a same value as a number of preceding and subsequent bits, an error calculation circuit operable to subtract an ideal version of the long magnet bits from the long magnet bits to yield an error signal, an adjacent track interference metric calculation circuit operable to calculate an adjacent track interference metric based on the error signal, and a comparator circuit operable to compare the adjacent track interference metric with a threshold value and to assert a refresh signal when the adjacent track interference metric is greater than the threshold value.