Microprocessor Atomic Instruction Completion Window Mechanism

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Solution Overview

Problem

Modern processors face disruptions when handling atomic instructions, as the tail pointer may incorrectly complete sub-instructions out of order, violating the atomic nature of the instruction set due to the tail pointer pointing to a non-finished instruction within an atomic instruction.

Innovation Solution

A method and system that utilize a sliding completion window and atomic status information in a Ready to Complete vector to adjust the tail pointer based on the completion status and atomic nature of instructions, ensuring that atomic instructions are completed as a single unit by excluding incomplete atomic instructions from the current clock cycle and shifting the completion window to include adjacent entries in the next cycle.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the processor uses a tail pointer to track instruction completion, then instruction completion tracking is simplified, but atomic instructions may be incorrectly completed out of order violating their atomicity

Engineering Contradiction:

Improveinstruction completion trackingVSAvoidatomic instruction completion

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The completion window is segmented into multiple slots, each capable of holding an instruction. The system divides the atomic instruction handling into separate phases: identification of atomic instructions, exclusion from current completion window, and deferred completion in a subsequent window. This segmentation allows the tail pointer mechanism to operate simply while preserving atomicity through structured control flow.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The system performs preliminary identification of atomic instructions before completion. By detecting atomic instructions in advance and excluding them from the current completion window, the system prevents potential atomicity violations before they can occur. The atomic instructions are prepared for deferred completion in a subsequent window, ensuring their atomic nature is preserved.

Inventive Principle:

Principle #10Preliminary action

2Productivity

If the processor completes instructions in parallel within a completion window, then processing throughput is improved, but atomic instructions straddling the window boundary cannot be completed correctly

Engineering Contradiction:

Improveinstruction completion throughputVSAvoidatomic instruction integrity

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The completion window is made dynamic by allowing it to shift between clock cycles. When an atomic instruction is detected at the boundary, the window dynamically adjusts by excluding the atomic instruction from the current cycle and including it in the next cycle. This dynamic adjustment maintains parallel processing efficiency for non-atomic instructions while ensuring atomic instructions are handled correctly across cycle boundaries.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system maintains continuous instruction completion by shifting the completion window to the next clock cycle for atomic instructions rather than stalling the entire pipeline. Non-atomic instructions continue to complete in parallel without interruption, while atomic instructions are seamlessly carried forward to the next window, ensuring both throughput and correctness.

Inventive Principle:

Principle #20Continuity of useful action

3Reliability

If the processor excludes atomic instructions from the current completion window, then atomicity is preserved, but the completion window must shift to the next clock cycle reducing throughput

Engineering Contradiction:

Improveatomic instruction completionVSAvoidinstruction completion throughput

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The system skips the atomic instruction in the current completion window by excluding it from completion, then rushes through to the next clock cycle where the atomic instruction is completed along with other instructions. This skipping mechanism minimizes the impact on throughput by quickly moving past the atomic instruction rather than holding up the entire completion process.

Inventive Principle:

Principle #21Skipping (Rushing through)

Solution Approach 2:

The atomic instruction is temporarily discarded from the current completion window and recovered in the next completion window. This discarding and recovering mechanism allows the current window to complete non-atomic instructions efficiently while ensuring the atomic instruction is not lost and will be completed in the appropriate context in the subsequent window.

Inventive Principle:

Principle #34Discarding and recovering

Data Source

PatentUS10831489B2Mechanism for completing atomic instructions in a microprocessor

Publication Date: 2020.11.10 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

Method and apparatus for completing atomic instructions in a microprocessor may be provided by identifying from a program-ordered Instruction Completion Table (ICT) a last entry in a completion window of instructions for completion in a current clock cycle of a processor; in response to determining that the last entry includes an atomic instruction that straddles the completion window: excluding the last entry from completion during the current clock cycle; completing instructions in the completion window for the current clock cycle; and shifting the completion window to include the last entry and a next entry adjacent to the last entry in the ICT in a next clock cycle.