Atomic Layer Etch for Dielectric Contact Selectivity
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Solution Overview
Problem
In semiconductor device fabrication, particularly for FinFETs, existing methods face challenges in achieving high selectivity during the etching of SiO with respect to SiN and SiGe, leading to potential damage and performance degradation due to non-selective etching, which can expose epitaxial growth regions to harmful plasma, causing defects and performance issues.
Innovation Solution
A method involving cyclical atomic layer etching with a fluorinated polymer deposition and activation phases, followed by selective etching and oxygen stripping in a plasma processing chamber, achieves high selectivity by using a fluorinated polymer layer that is selectively stripped and etched, ensuring minimal damage to the FinFET structure and maintaining the integrity of the SiN etch stop layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching methods are used to etch SiO, then etching speed is maintained, but selectivity with respect to SiN and SiGe deteriorates, causing over-etching and damage to epitaxial growth regions
Solution Approach 1:
The etching process is divided into multiple sequential steps with different chemistries: first etching SiO with CF4/O2 plasma, then etching SiN with CF4/H2 plasma. This segmentation allows each step to be optimized for its specific target material, achieving high selectivity (>10:1 for SiO/SiN and >10:1 for SiO/SiGe) while preventing damage to underlying epitaxial regions through the protective SiN stop layer.
Solution Approach 2:
A silicon nitride (SiN) intermediate layer is introduced as an etch stop layer between the SiO dielectric and the epitaxial silicon regions. This intermediary layer provides a selective barrier that stops the etching process before reaching the sensitive epitaxial growth areas, preventing over-etching damage while allowing complete removal of the SiO layer.
2Productivity
If high power plasma is used to increase etching rate, then productivity improves, but selectivity deteriorates and harmful plasma exposure increases
Solution Approach 1:
The etching process uses periodic alternation between different plasma chemistries: CF4/O2 for SiO etching followed by CF4/H2 for SiN etching. Each plasma type is applied periodically in sequence, allowing high etching rates for the current target material while maintaining selectivity by switching to a different chemistry that is selective for the next layer, thus preventing cross-contamination and over-etching.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach provides high selectivity ratios (>10:1) for etching SiO with respect to SiN, SiGe, and Si, preventing over-etching and damage to the epitaxial growth, thereby enhancing device performance by maintaining the SiN layer's protective function and improving contact area and resistance.
Implementation Method 1
An atomic layer etch selectively etches SiO with respect to SiN and deposits a fluorinated polymer
Implementation Method 2
flowing a stripping gas comprising oxygen into the plasma processing chamber, forming a plasma from the stripping gas
Data Source
AI summary
A method for forming a semiconductor device in a plasma processing chamber is provided. An atomic layer etch selectively etches SiO with respect to SiN and deposits a fluorinated polymer. The fluorinated polymer layer is stripped, comprising flowing a stripping gas comprising oxygen into the plasma processing chamber, forming a plasma from the stripping gas, and stopping the flow of the stripping gas. A SiN layer is selectively etched with respect to SiO and SiGe and Si.