Atomic Layer Etching Gas Flow and Plasma Control
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Solution Overview
Problem
Current atomic layer etching (ALE) processes face challenges in finely patterning semiconductor devices due to inefficiencies in gas management and plasma generation, leading to incomplete etching and potential damage to the etching target layers.
Innovation Solution
A method involving a semiconductor device fabricating apparatus that uses a chamber with integrated gas supply, plasma source, and sensing elements to perform a three-stage process: adsorption, purging, and plasma-induced etching, where gases are directly supplied into the plasma generation space, and process conditions are adjusted based on real-time measurements from optical emission spectrometry, photon flux, bias voltage, and electron density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional atomic layer etching processes are used, then etching can be performed, but gas management inefficiencies lead to incomplete etching and potential damage to etching target layers
Solution Approach 1:
The patent implements real-time monitoring of gas flow rates, pressure, and plasma parameters during the ALE process. Sensors detect deviations from optimal conditions and feed this information back to the control system, which automatically adjusts process parameters to maintain etching precision and prevent target layer damage.
Solution Approach 2:
The patent employs dynamic adjustment of gas flow rates and plasma power during different stages of the ALE cycle. The system transitions between adsorption, purging, and etching phases with optimized parameter profiles, allowing precise control of the etching front to achieve complete removal while protecting underlying layers.
2Productivity
If gas flow rate is increased to improve etching speed, then productivity increases, but etching precision and control are compromised
Solution Approach 1:
The patent utilizes periodic pulsing of gas flow during the ALE process. Instead of continuous high flow, the system applies gas in controlled pulses synchronized with plasma generation cycles. This periodic action maintains high etching rates during active phases while allowing stabilization during off-phases, preserving precision.
Solution Approach 2:
The patent dynamically changes multiple process parameters including gas flow rate, pressure, and plasma power in coordinated sequences. By optimizing the timing and magnitude of these parameter changes during adsorption, purging, and etching phases, the system achieves high productivity without sacrificing etching precision.
3Productivity
If plasma power is increased to enhance etching efficiency, then productivity improves, but damage to etching target layers increases
Solution Approach 1:
The patent performs preliminary adsorption of reactive gas species onto the target layer surface before applying high-power plasma. This pre-coverage creates a protective interface that allows subsequent high-power etching to proceed efficiently while minimizing direct damage to the target layer. The adsorbed layer acts as a buffer during the high-energy plasma phase.
Solution Approach 2:
The patent segments the plasma etching process into distinct phases: a low-power plasma generation phase that activates reactive species, followed by a high-power phase that performs the actual etching. This temporal segmentation allows the system to achieve high etching efficiency during the high-power phase while limiting target layer damage through the protective adsorbed layer established in earlier phases.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the precision and efficiency of the ALE process, allowing for finer etching with reduced damage to the semiconductor layers by optimizing gas flow, plasma generation, and etching time, thereby improving the overall quality of semiconductor device fabrication.
Implementation Method 1
performing a first periodical process in which a first gas is supplied to an inside of the chamber and the first gas is adsorbed onto the wafer
Implementation Method 2
performing a third periodical process in which a third gas is supplied to the inside of the chamber, plasma including the third gas is generated, the plasma collides with the wafer, and the first gas adsorbed onto the wafer is removed
Implementation Method 3
performing a sputtering process in which the plasma collides with the wafer
Implementation Method 4
loading a wafer onto an electrostatic chuck in a chamber
Data Source
AI summary
Provided are a semiconductor device fabricating apparatus configured to perform an atomic layer etching process and a method of fabricating a semiconductor device including performing the atomic layer etching process. The method includes loading a wafer onto an electrostatic chuck in a chamber, performing a first periodical process in which a first gas is supplied to an inside of the chamber and the first gas is adsorbed onto the wafer, performing a second periodical process in which a second gas is supplied to the inside of the chamber and the first gas remaining in the chamber is exhausted to an outside of the chamber, performing a third periodical process in which a third gas is supplied to the inside of the chamber, plasma including the third gas is generated, the plasma collides with the wafer, and the first gas adsorbed onto the wafer is removed, and unloading the wafer to the outside of the chamber.