Atomic Scrubber Circuitry for Single Bit Error Correction

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Solution Overview

Problem

Existing memory systems require complex and power-intensive dedicated hardware to detect and correct single bit errors, which increases design complexity, circuit area, and manufacturing costs, and can lead to the migration of single bit errors into double bit errors.

Innovation Solution

The implementation of atomic scrubber circuitry that detects and corrects single bit errors within the memory by analyzing each bit and stopping data cache stages during error detection and correction, reducing the need to track error addresses and thereby minimizing memory requirements and circuit complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dedicated error correcting hardware is used to track and correct single bit errors, then error correction capability is improved, but device complexity and manufacturing costs increase

Engineering Contradiction:
Improveerror correction capabilityVSAvoidhardware complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the error correction function from dedicated hardware and implements it through software/firmware running on the general-purpose processor. The atomic scrubber component detects and corrects single bit errors by reading memory contents and using parity bits, eliminating the need for complex dedicated error correction hardware while maintaining reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The processor is made multi-functional by enabling it to perform both general computing tasks and error correction functions. The atomic scrubber operates as a software component that leverages the processor's existing capabilities to detect and correct memory errors, making the processor universal for both computation and error correction without requiring separate dedicated hardware.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If dedicated error correcting hardware is used to track single bit errors, then error correction is improved, but circuit area increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The error correction functionality is extracted from physical hardware and implemented as software, eliminating the need for additional circuit area. The atomic scrubber uses the processor's existing memory access capabilities and adds error correction logic through software instructions rather than hardware circuits.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of implementing error correction logic in hardware circuits, the patent uses software copies of error detection and correction algorithms. The atomic scrubber reads memory contents and applies error correction logic through software, effectively copying the error correction function into the processor's instruction set rather than duplicating it in hardware.

Inventive Principle:
Principle #26Copying

3Productivity

If memory scrubbing is performed while data cache stages are accepting transactions, then productivity is maintained, but measurement precision of error detection decreases

Engineering Contradiction:
Improvememory access continuityVSAvoiderror detection accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by pausing the data cache stages before performing memory scrubbing operations. This ensures that no new transactions are accepted during the scrubbing process, preventing potential errors from being introduced or missed during the error detection and correction phase, thereby maintaining measurement precision.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory scrubbing operation is implemented as a periodic action that temporarily suspends normal memory operations. The atomic scrubber is activated at specific intervals to perform error detection and correction, then the system returns to normal operation. This periodic interruption ensures error detection accuracy while minimizing impact on overall productivity.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11928024B1Atomic correction of single bit errors within a memory
Publication Date: 2024.03.12 MIPS HLDG INC
  • US11928024B1 patent drawing
  • US11928024B1 patent drawing
  • US11928024B1 patent drawing

AI summary

A system and method corrects single bit errors in a memory by detecting a single bit error with a memory. The memory is accessed via data cache stages of a pipeline. Further, based on detecting the single bit error, the data cache stages of the pipeline are stopped from accepting new transactions. A value associated with each address of the memory is read based on stopping the new transactions from being accepted, and the detected single bit errors within the values are corrected.