Inter-Process Signaling via Atomic Semaphore Registers
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Solution Overview
Problem
In multi-master systems, existing signaling mechanisms for shared resources are inefficient, relying on semaphores and messaging signals that may not effectively manage access to resources, leading to potential bottlenecks and power consumption issues due to continuous polling and lack of efficient interrupt or event-based signaling.
Innovation Solution
A mechanism using a semaphore flag register with alias registers for atomic read-and-clear operations, along with interrupt or event generation to indicate resource availability, allowing efficient inter-process signaling and reducing power consumption by enabling low-power states in waiting masters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If continuous polling is used to check resource availability, then resource access can be detected, but power consumption increases and response time is delayed
Solution Approach 1:
The patent introduces an inter-process signal module as an intermediary between masters and shared resources. This module includes a semaphore flag register that automatically updates when resources are allocated or freed, eliminating the need for continuous polling. Masters can now passively receive notifications through interrupts or events when resources become available, significantly reducing power consumption while maintaining reliable resource access detection.
2Reliability
If semaphores are used to control access to shared resources, then resource allocation can be managed, but system complexity increases
Solution Approach 1:
The patent extracts the complex semaphore management logic from the master processors and consolidates it into a dedicated inter-process signal module. This module contains the semaphore flag register and associated control logic, simplifying the overall system architecture. Masters interact with this centralized module through standardized interfaces (reading/writing flag registers), which reduces the complexity burden on individual masters while maintaining reliable resource allocation control.
3Measurement precision
If atomic read-and-clear operations are implemented, then resource access accuracy is improved, but operation complexity increases
Solution Approach 1:
The patent merges the read and clear operations into a single atomic instruction within the inter-process signal module. When a master reads the semaphore flag register, the operation atomically both reads the current status and clears the flag if a resource is available. This combination ensures accurate resource access detection without requiring complex multi-step atomic operations, maintaining precision while simplifying the operational interface for masters.
Data Source
AI summary
An inter-process signaling system and method support implementation of semaphores or messaging signals between masters in a multi-master system, or between tasks in a single master system. A semaphore flag register contains one or more bits indicating whether resources are free or busy. The register is aliased to allow atomic read-and-clear of individual bits in the register. Masters poll the status of a resource until the resource reads as free. Alternatively, interrupts or events per master can be implemented to indicate availability of a resource.

