Programmable Atomic Transaction Loop Detection in Memory Controllers

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Solution Overview

Problem

In chiplet systems, programmable atomic transactions in memory controllers can enter infinite loops, causing resource deadlock and affecting other processes, with existing detection methods like timeouts being inefficient and difficult to implement.

Innovation Solution

Implement an instruction counter to monitor the execution of programmable atomic transactions, terminating them if they exceed a predefined instruction execution limit to prevent infinite loops, thereby ensuring timely resource release.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If timeout-based detection methods are used to detect infinite loops, then detection capability is provided, but system latency increases and implementation complexity increases

Engineering Contradiction:
Improveinfinite loop detection capabilityVSAvoidsystem latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-initializing an instruction counter to zero before executing programmable atomic transactions. This counter is incremented with each instruction executed, allowing the system to proactively track execution progress and detect infinite loops before they cause significant latency or resource exhaustion, rather than waiting for timeout conditions to occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces the mechanical timeout-based detection system with a software-based instruction counting mechanism. Instead of relying on hardware timers and timeout thresholds, the system uses a software counter that automatically increments with each instruction, providing more precise and latency-free detection of infinite loops through programmatic control.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If timeout-based detection methods are used to detect infinite loops, then detection capability is provided, but implementation difficulty increases

Engineering Contradiction:
Improveinfinite loop detection capabilityVSAvoidimplementation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies self-service by making the instruction counter automatically increment with each executed instruction without requiring external intervention. The counter is initialized before transaction execution and continuously updated by the execution engine itself, eliminating the need for complex timeout configuration, timer management, and threshold adjustment that would increase implementation complexity.

Inventive Principle:
Principle #25Self-service

3Reliability

If instruction execution limit is enforced to prevent infinite loops, then resource availability is improved, but transaction processing speed may be reduced

Engineering Contradiction:
Improveresource availabilityVSAvoidtransaction processing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the instruction execution limit parameter based on the specific programmable atomic transaction being executed. Rather than using a fixed threshold that might prematurely terminate valid transactions, the system configures appropriate limits for different transaction types, balancing the need to prevent infinite loops with maintaining efficient processing speed for legitimate operations.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250355666A1Detecting infinite loops in a programmable atomic transaction
Publication Date: 2025.11.20 MICRON TECHNOLOGY INC
  • US20250355666A1 patent drawing
  • US20250355666A1 patent drawing
  • US20250355666A1 patent drawing

AI summary

Disclosed in some examples are systems, methods, devices, and machine-readable mediums to detect and terminate programmable atomic transactions that are stuck in an infinite loop. In order to detect and terminate these transactions, the programmable atomic unit may use an instruction counter that increments each time an instruction is executed during execution of a programmable atomic transaction. If the instruction counter meets or exceeds a threshold instruction execution limit without reaching the termination instruction, the programmable atomic transaction may be terminated, all resources used (e.g., memory locks) may be freed, and a response may be sent to a calling processor.