Atomic Write Controller Using Adaptive LUT Update Methods

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Solution Overview

Problem

Existing memory systems face challenges in efficiently managing the Atomic Write operation, particularly in maintaining data consistency and performance during cancellation, as they struggle to balance the need for quick rollback and storage costs.

Innovation Solution

The memory system employs a controller circuit that selectively uses either the LUT update postponing method or the LUT recovering method for address mapping, allowing for adaptive control of the Atomic Write operation based on application requirements, ensuring efficient cancellation and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the LUT update postponing method is used for Atomic Write operation, then the cancellation speed is improved, but the storage cost increases due to requiring additional update data storage

Engineering Contradiction:
Improvecancellation speedVSAvoidstorage cost
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The system dynamically switches between LUT update postponing method and LUT recovering method based on the cancellation completion rate threshold. When the threshold is met, it uses the postponing method for faster cancellation; otherwise, it uses the recovering method to save storage resources. This dynamic adaptation resolves the contradiction between cancellation speed and storage cost.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the operational parameter (cancellation completion rate threshold) to determine which method to use. By monitoring whether the cancellation completion rate exceeds the threshold, the system adjusts its behavior to balance speed and storage cost requirements.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If the LUT recovering method is used for Atomic Write operation, then the storage cost is reduced, but the cancellation speed deteriorates

Engineering Contradiction:
Improvestorage costVSAvoidcancellation speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The system dynamically selects between methods based on real-time conditions. When cancellation completion rate is low, it uses the recovering method to conserve storage; when the rate exceeds the threshold, it switches to the postponing method for faster cancellation, thus dynamically balancing storage cost and speed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system performs preliminary assessment of the cancellation completion rate before deciding which method to use. This preliminary action allows it to choose the optimal method in advance, avoiding the need to always use the slower recovering method or always incur the storage cost of the postponing method.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If a fixed cancellation method is used for all namespaces, then the system complexity is reduced, but the adaptability to different application requirements deteriorates

Engineering Contradiction:
Improvesystem complexityVSAvoidadaptability to different namespaces
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

Instead of a fixed method, the system dynamically determines the cancellation method based on the cancellation completion rate for each namespace. This dynamic approach maintains relatively simple system architecture while providing adaptability to different application requirements through condition-based method selection.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system applies different cancellation methods to different namespaces based on their specific characteristics and cancellation completion rates. Each namespace can independently use the most appropriate method (postponing or recovering), providing local optimization without requiring complete system redesign.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9940071B2Memory system that carries out an atomic write operation
Publication Date: 2018.04.10 KIOXIA CORP
  • US9940071B2 patent drawing
  • US9940071B2 patent drawing
  • US9940071B2 patent drawing

AI summary

A memory system includes a non-volatile memory and a controller circuit. The controller circuit is configured to carry out an atomic write operation in the non-volatile memory in response to an atomic write command, and selectively carry out one of a first operation and a second operation corresponding to address mapping between a logical address and a physical address of the non-volatile memory, along with the atomic write operation. When the first operation is selected, the controller circuit starts to update the address mapping after receiving a notification that writing of all data of the atomic write operation has been completed. When the second operation is carried out, the controller circuit starts to update the address mapping before receiving the notification.