ATPG Test Cube Filling Using Signal and Hold Probabilities
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Solution Overview
Problem
Automatic test pattern generation for integrated circuits often results in excessive switching activity, leading to abnormal peak and average power dissipation and supply currents during testing, which can damage the circuit and cause yield loss.
Innovation Solution
The method involves calculating signal and hold probabilities to guide the filling of unspecified values in test cubes, reducing power consumption without requiring additional hardware, by determining preferred values for primary inputs and scan cells, and using these probabilities to generate test patterns that minimize power dissipation and supply currents during capture cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional ATPG methods are used to generate test patterns, then test coverage is achieved, but excessive switching activity causes abnormal peak and average power dissipation
Solution Approach 1:
The patent changes the parameter values in test patterns by using signal and hold probabilities to guide the filling of unspecified values (X-values) in test cubes. By selecting specific logic values (0 or 1) based on probability calculations, the switching activity is controlled to reduce power dissipation while maintaining fault detection capability. This is achieved by modifying the test cube generation process to consider power metrics when filling unspecified values.
Solution Approach 2:
The patent performs preliminary calculation of signal probabilities and hold probabilities before generating test patterns. These probabilities are computed in advance to predict switching activity, and then used to guide the test cube filling process. By preparing this probability information beforehand, the system can make informed decisions about which values to assign to unspecified positions, thereby preventing excessive power dissipation before it occurs during actual testing.
2Reliability
If traditional ATPG methods are used to generate test patterns, then test coverage is achieved, but abnormal supply currents occur during testing
Solution Approach 1:
The patent modifies the test pattern parameters by using probability-based guidance to select logic values that minimize switching activity. By changing the unspecified values in test cubes from random or arbitrary selections to probability-informed selections, the resulting test patterns produce more normal supply current profiles during capture cycles, avoiding the abnormal current spikes associated with traditional ATPG methods.
3Reliability
If scan cells are clocked during capture cycles, then test coverage is improved, but excessive switching activity creates hot spots that could damage the CUT
Solution Approach 1:
The patent changes the timing and value parameters of scan cell operations by using hold probabilities to determine when and how to update scan cell contents. By carefully selecting which unspecified values to fill and when to clock scan cells, the method reduces unnecessary switching activity that would generate heat, thereby preventing hot spots while still achieving adequate test coverage through the probability-guided test pattern generation.
Data Source
AI summary
Disclosed herein are representative embodiments of methods, apparatus, and systems used for generating test patterns as may be used as part of a test pattern generation process (for example, for use with an automatic test pattern generator (ATPG) software tool). In one exemplary embodiment, hold probabilities are determined for state elements (for example, scan cells) of a circuit design. A test cube is generated targeting one or more faults in the circuit design. In one particular implementation, the test cube initially comprises specified values that target the one or more faults and further comprises unspecified values. The test cube is modified by specifying at least a portion of the unspecified values with values determined at least in part from the hold probabilities and stored.