ATSC Transmitter Clock Feedback for Simulcast Synchronization

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Solution Overview

Problem

Existing methods for synchronizing terrestrial high-frequency transmitters in ATSC standard-based networks often result in short-term signal interruptions due to inaccuracies in system clock generation and data rate changes, particularly caused by asynchronous GPS receivers and Doppler effects, leading to incorrect delay settings in the delay element.

Innovation Solution

A control circuit in each transmitter compares the actual transmission time with the target transmission time, allowing for automatic correction of time shifts in the system clock within the mHz range, ensuring continuous signal synchronization without disrupting the network, and adjusts the delay time in successive data frames as needed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the system clock is generated locally in the transmitter using GPS reference, then the transmitter can operate independently, but time synchronization accuracy deteriorates due to GPS receiver asynchronism and Doppler effects

Engineering Contradiction:
Improveindependent operation capabilityVSAvoidtime synchronization accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent implements a feedback mechanism where the actual transmission time is continuously measured and compared with the target transmission time. The time difference is used to adjust the system clock frequency dynamically, ensuring that despite independent GPS-based clock generation, the transmitter maintains accurate synchronization with the network. This closed-loop control resolves the contradiction by allowing independent operation while compensating for synchronization errors through continuous feedback adjustment.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If the delay time is recalculated when time deviations occur, then synchronization accuracy is improved, but signal interruptions are caused due to recalculation processes

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidsignal continuity
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent adjusts the system clock frequency in advance based on the measured time difference between actual and target transmission times. Instead of recalculating delay time when deviations occur (which causes interruptions), the system proactively prevents deviations by continuously tuning the clock frequency. This preliminary adjustment approach maintains both high synchronization accuracy and uninterrupted signal transmission.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If the system clock frequency is adjusted to correct time errors, then time synchronization is improved, but network stability may be affected by larger adjustments

Engineering Contradiction:
Improvetime synchronization accuracyVSAvoidnetwork stability
Core Design Contradiction:
Measurement precisionVSStability of the object's composition

Solution Approach 1:

The patent implements dynamic frequency adjustment where the system clock frequency is continuously adapted based on the measured time difference. The adjustment is proportional to the error, allowing small frequent corrections rather than large infrequent changes. This dynamic approach maintains precise synchronization while preserving network stability, as the gradual adjustments do not disrupt the overall network operation.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP2002580B1Synchronizing assembly for the high-frequency transmitters of a common frequency network
Publication Date: 2011.08.17 ROHDE & SCHWARZ GMBH & CO KG
  • EP2002580B1 patent drawingFigure 1

AI summary

According to the invention, a digital data stream (TS) is first generated in a master station (Z) in the form of periodic data frames and is fed to the individual high-frequency transmitters (S1 to SX) of a synchronized network in order to synchronize the transmission time of the digital data stream in the individual transmitters (S1 to SX) which operate according to the ATSC standard and transmit identical data on the same respective frequency. The setpoint transmission time is then calculated in the transmitters (S1 to SX) from a synchronizing time stamp which is inserted into the data frames in the master station (Z) and from a time reference that is used in both the master station (Z) and the transmitters (S1 to SX), transmission of the data frames at the output (A) of the transmitters (S1 to SX) being determined by a system clock (7) that is generated in the transmitters (S1 to SX). Furthermore, the setpoint transmission time in each transmitter (S1 to SX) is compared to the real data frame transmission time determined by the system clock at the output (A) of the transmitters, and the clock frequency of the clock generator (7) is regulated by means of a control circuit in accordance with said comparison such that the real transmission time determined by the system clock corresponds to the calculated setpoint transmission time.