CT Sigma-Delta Audio ADC With Three-Level DAC for Low-Noise Range
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Solution Overview
Problem
Existing audio analog-to-digital converter (ADC) systems face challenges in achieving high dynamic range while maintaining low power consumption and minimizing noise, particularly in low power devices such as smartphones and tablets.
Innovation Solution
The implementation of a continuous-time sigma-delta (CTSD) ADC architecture, which includes a transconductance amplifier, loop filter, quantizer, logic circuit, and digital-to-analog converter with three-level unit elements, mitigates noise contributions from active elements and allows for higher dynamic range without increasing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional ADC architectures are used to achieve high dynamic range, then power consumption increases
Solution Approach 1:
The patent segments the feedback DAC into multiple three-level unit elements that can be independently controlled. This segmentation allows selective activation of only the necessary number of unit elements required for the current signal level, rather than keeping all elements active. Consequently, the system achieves high dynamic range through precise granular control while reducing overall power consumption by deactivating unnecessary elements.
Solution Approach 2:
The patent implements dynamic control of the three-level unit elements in the feedback DAC, where the activation state of each unit element changes based on the instantaneous signal requirements. This dynamic operation allows the system to adapt its power consumption to the actual signal level being processed, maintaining high dynamic range performance only when needed while consuming less power during low-signal conditions.
2Productivity
If active elements are increased to improve signal processing capability, then noise contribution increases
Solution Approach 1:
The patent extracts and eliminates unnecessary active elements from the feedback DAC by implementing three-level unit elements that can be deactivated. By taking out only the essential active elements required for current signal processing and deactivating the rest, the system maintains adequate signal processing capability while significantly reducing noise contributions from inactive elements.
3Use of energy by moving object
If power consumption is reduced, then dynamic range performance deteriorates
Solution Approach 1:
The patent changes the operational parameters of the feedback DAC by implementing three-level unit elements with selectable activation states (active, inactive, or high-impedance). This parameter change allows the system to dynamically adjust the number of active elements based on signal requirements, achieving low power consumption during low-signal conditions while maintaining high dynamic range performance when high signal levels are processed.
Data Source
AI summary
An analog-to-digital conversion (ADC) system includes a transconductance amplifier, loop filter, quantizer, logic circuit, and digital-to-analog converter (DAC). The transconductance amplifier is configured to generate a current signal in response to an audio signal. The loop filter is connected to the transconductance amplifier and configured to generate a filtered signal based on the current signal. The quantizer is configured to generate a digital representation of the filtered signal. The logic circuit is configured to generate control signals based on the digital representation. The DAC is coupled to the loop filter's and the transconductance amplifier's output. The DAC includes three-level unit elements, where each unit element is configured to provide one of two signal levels or no signal to the loop filter in response to control signals from the logic circuit. Such an ADC system may allow for a high dynamic range while maintaining low power consumption and low noise.