Differential Audio Amplifier Common-Mode Buffer for Pop Noise
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Solution Overview
Problem
Audio amplifier circuitry experiences audible artefacts such as popping sounds due to voltage transitions at the output nodes during start-up and shut-down, especially when a negative power supply is not available.
Innovation Solution
The circuitry includes common mode buffer circuitry that selectively outputs a common mode voltage to the output nodes, along with low pass filter circuitry and discharge switches to manage voltage transitions and minimize differential transients.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the amplifier circuitry uses a positive power supply and reference power supply (without negative power supply) to generate differential output signal, then the device complexity is reduced, but audible artefacts such as popping sounds occur during voltage transitions at output nodes
Solution Approach 1:
A common mode buffer circuit is introduced as an intermediary component between the power supply and the output nodes. This buffer selectively outputs the common mode voltage to the first and second output nodes, acting as a mediator that controls the voltage transition process and prevents direct coupling of power supply transitions to the output, thereby eliminating popping sounds while maintaining the simplified single-rail power supply configuration
Solution Approach 2:
The common mode buffer circuit is enabled before the amplifier circuitry undergoes voltage transitions during start-up or shut-down. By preparing the buffer in advance and having it ready to selectively output the common mode voltage, the circuit preemptively prevents the formation of differential transients at the output nodes, addressing the harmful effect before it can occur
Data Source
AI summary
The present disclosure relates to circuitry comprising audio amplifier circuitry for receiving an audio signal to be amplified; and first and second output nodes for outputting first and second differential output signals. The circuitry further comprises common mode buffer circuitry configured to receive a common mode voltage and to selectively output the common mode voltage to the first and second output nodes.