Audio Op-Amp Input Bias Canceller for Offset and Noise Reduction
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Solution Overview
Problem
Audio operational amplifiers face challenges in canceling out input bias current, which can lead to voltage offsets, pop-and-click noise, and other performance issues, particularly in applications with high common input impedance.
Innovation Solution
The implementation of an input bias cancellation stage that includes an input differential pair, a current mirror, and a bias duplicator transistor, which duplicates and mirrors the input bias current to subtract it from the bases of the transistors, effectively canceling out the input bias current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional operational amplifier input stages are used, then the circuit is simple, but input bias current causes voltage offsets and noise
Solution Approach 1:
The input stage is segmented into multiple functional blocks: a first differential pair for signal amplification, a second differential pair for bias current sensing, and a current mirror for bias current replication. This segmentation allows independent optimization of signal processing and bias current cancellation functions, effectively reducing input bias current effects while maintaining manageable complexity through modular design.
Solution Approach 2:
A bias duplicator transistor is introduced as an intermediary element that replicates the bias current from the first differential pair transistors. This intermediary component enables the bias current to be sensed in one differential pair and applied to cancel the bias current in the other differential pair, effectively eliminating input bias current effects without requiring direct modification of the signal path transistors.
2Measurement precision
If bias cancellation circuits are added, then voltage offsets and noise are reduced, but the circuit complexity increases
Solution Approach 1:
The bias cancellation function is merged with the signal amplification function by using matched differential pairs where the same transistor types and configurations are used for both signal processing and bias current sensing. This merging allows the circuit to perform dual functions with minimal additional components, reducing voltage offsets and noise while limiting the increase in circuit complexity through functional integration.
Solution Approach 2:
The bias current is copied from the first differential pair transistors to the second differential pair transistors through a bias duplicator transistor and current mirror. This copying mechanism allows the bias current characteristics to be replicated precisely, enabling accurate bias current cancellation that reduces voltage offsets and noise without requiring complex active cancellation circuits.
3Adaptability or versatility
If high common input impedance is required, then audio preamplification performance improves, but input bias current effects worsen
Solution Approach 1:
The circuit applies preliminary anti-action by pre-canceling the input bias current effects before they can cause voltage offsets in high impedance applications. The bias duplicator transistor and current mirror replicate the bias current in advance, and the second differential pair is configured to subtract this replicated bias current from the signal path, preventing bias current induced voltage offsets before they affect the high impedance input nodes.
Solution Approach 2:
The circuit changes the bias current parameter by using different transistor configurations and doping levels in the first and second differential pairs. The first differential pair uses transistors optimized for signal amplification with high input impedance, while the second differential pair uses matched transistors optimized for bias current sensing and cancellation. This parameter differentiation allows high common input impedance to be maintained while effectively canceling bias current effects.
Data Source
AI summary
An input bias cancellation stage for an audio operational amplifier is provided. The input bias cancellation stage includes an input differential pair, a current mirror, and a bias duplicator transistor that substantially duplicates the input bias current. The bias duplicator transistor receives substantially the same emitter current as the transistors in the input differential pair, and has substantially the same Vce as the transistors in the input differential pair. The current mirror mirrors the duplicated bias current and subtracts it from the bases of the transistors in the input differential pair so that the input bias current is substantially cancelled.


