Audio Signal Circuit for In-Place FFT Bit Reversal

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Solution Overview

Problem

Existing digital audio signal processing methods for microphone assemblies, particularly those using MEMS transducers, face inefficiencies in performing in-place bit reversal necessary for FFT and IFFT calculations, often requiring additional buffers and resulting in increased processing time and hardware requirements.

Innovation Solution

An efficient method for in-place bit-reversal is implemented using a single buffer, where a dual-issue processor executes a series of load and store instructions to swap data indices, minimizing the need for additional buffers and reducing processing cycles by utilizing indices and swap enables to determine necessary swaps within the buffer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional bit-reversal methods are used with additional buffers, then the bit-reversal operation can be completed, but the hardware requirements and processing time increase

Engineering Contradiction:
Improvebit-reversal processing speedVSAvoidbuffer memory requirements
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the bit-reversal operation with the existing single buffer by performing in-place swaps. Instead of using separate source and destination buffers, the algorithm directly swaps elements within the same buffer by calculating bit-reversed indices and exchanging values between those positions, thereby eliminating the need for additional buffer memory while maintaining processing efficiency

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transforms the bit-reversal problem from a data movement operation requiring additional storage to an in-place index transformation operation. By changing the dimension of operation from inter-buffer data transfer to intra-buffer index calculation and swapping, the solution eliminates the need for additional buffer memory while achieving the same bit-reversal effect

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of operation

If additional buffers are allocated for bit-reversal, then data can be reversed, but the processing time and hardware resources increase

Engineering Contradiction:
Improvesimplicity of bit-reversal implementationVSAvoidprocessing cycles required
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-calculating bit-reversed indices using bit manipulation operations before performing the actual swaps. The algorithm computes the bit-reversed index for each position in advance, then performs direct swaps without requiring complex runtime calculations, thereby reducing processing cycles and simplifying the implementation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces mechanical data movement between buffers with computational index transformation and in-place swapping. Instead of physically moving data between separate memory buffers, the solution uses bit manipulation operations to calculate target indices and performs swaps within the same buffer, reducing hardware resource requirements and processing time

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10908880B2Audio signal circuit with in-place bit-reversal
Publication Date: 2021.02.02 KNOWLES ELECTRONICS LLC
  • US10908880B2 patent drawing
  • US10908880B2 patent drawing
  • US10908880B2 patent drawing

AI summary

An integrated circuit for processing audio signals from a microphone assembly, combinations thereof and methods therefor, including a multi-issue processor configured to execute multiple instructions concurrently and connectable to a memory with a plurality of locations each represented by a corresponding index. Bit-reversal is performed on a sequence of audio data bits stored in memory by concurrently performing a load or store operation related to a first index and determining whether to perform a load operation for a second index.