Audio Processor Clock Bypass Switching for Main Clock Loss

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Solution Overview

Problem

Electronic systems face disruptions and potential failures when external clock sources are turned on or off, as system software has limited control over these external clock sources, leading to indeterminate system states.

Innovation Solution

An audio processor with a clock detection circuit and an automatic clock bypass circuit that monitors the status of the main clock and switches to an alternate clock source upon loss, ensuring system stability and graceful recovery.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If an external clock source is used, then the system can receive clock signals from external sources, but the system software has limited control over the clock source and may enter an indeterminate state or suffer system failure when the clock is turned on or off

Engineering Contradiction:
Improveability to receive clock signals from multiple sourcesVSAvoidsystem stability when clock source changes
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The clock detection circuit continuously monitors the external clock source status in advance before any potential clock loss occurs. By detecting clock presence or absence proactively, the system can prepare for clock source changes and switch to internal clock sources before system failure occurs, thus maintaining reliability while using external clock sources

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements a feedback mechanism where the clock detection circuit continuously monitors the external clock source and provides status information to the system software. This feedback loop enables the software to take appropriate actions based on clock status, ensuring the system remains in a determined state and can switch clock sources reliably

Inventive Principle:
Principle #23Feedback

2Adaptability or versatility

If the clock source is turned on or off, then the clock status changes, but the system software has no way to detect this change and the system may be left hanging

Engineering Contradiction:
Improveclock source flexibilityVSAvoidclock status detection capability
Core Design Contradiction:
Adaptability or versatilityVSDifficulty of detecting and measuring

Solution Approach 1:

The clock detection circuit operates autonomously to monitor the clock source status without requiring active intervention from the system software. The circuit self-detects clock presence or absence and can trigger clock source switching automatically, eliminating the need for software to continuously poll or manage clock status detection

Inventive Principle:
Principle #25Self-service

3Reliability

If multiple clock sources are available, then the system can switch to alternate clock sources upon loss of main clock, but additional circuitry is needed for clock detection and switching

Engineering Contradiction:
Improvesystem recovery from clock lossVSAvoidclock detection and switching circuitry
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The clock detection circuit and clock bypass circuit are integrated into a unified system where the detection circuit monitors clock status and directly controls the bypass circuit for automatic switching. By merging these functions into a coordinated system, the patent reduces overall complexity compared to having separate independent detection and switching mechanisms

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11184011B2Clock detection and automatic PLL output bypass switching for an audio processor
Publication Date: 2021.11.23 SAMSUNG ELECTRONICS CO LTD
  • US11184011B2 patent drawing
  • US11184011B2 patent drawing
  • US11184011B2 patent drawing

AI summary

Systems and methods are disclosed for an audio processor that includes a clock detection circuit and a clock bypass circuit. According to various embodiments, the clock detection circuit can check and indicate the status of a main clock and upon detection of a loss of the main clock, the clock bypass circuit can switch the source of the main clock to an alternate source such as an on chip oscillator allowing the system to gracefully recover from the clock loss event.