Audio Encoder Bit Allocation Using Arithmetic-Coded MSB Bands

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Solution Overview

Problem

Digital communication systems face inefficiencies due to non-integer length code words resulting from channel bandwidth constraints, leading to underutilization of bits, especially when the number of unique frames (n) is not a power of two, causing computational expenses in high-bandwidth, high-fidelity systems.

Innovation Solution

The system employs a combination of Factorial Pulse Coding and Arithmetic Coding, where code words are split into Most Significant Bits (MSB) and Least Significant Bits (LSB) portions, with Arithmetic Coding used to efficiently encode and decode MSB portions, allowing for bit reallocation and redistribution to optimize bit usage across different frequency bands.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If k bits are allocated to represent n unique frames where n is not a power of two, then the system can represent all unique frames, but the bits are not fully utilized causing inefficiency

Engineering Contradiction:
Improvecompleteness of frame representationVSAvoidbit utilization efficiency
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent divides the code word into two separate parts: MSB (Most Significant Bit) portion and LSB (Least Significant Bit) portion. The MSB portion uses ⌊log2(n)⌋ bits to represent the majority of the frame indices, while the LSB portion uses the remaining bits to represent the remainder. This segmentation allows the system to efficiently represent n unique frames without allocating unnecessary bits, thereby improving bit utilization efficiency while maintaining complete frame representation.

Inventive Principle:
Principle #1Segmentation

2Loss of energy

If MSB and LSB portions are combined to reduce overall bit size, then bit utilization efficiency improves, but computational complexity increases due to required high precision multiplication operations

Engineering Contradiction:
Improvebit utilization efficiencyVSAvoidcomputational complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent separates the encoding and decoding processes into distinct stages involving MSB and LSB portions. During encoding, the frame index is divided into MSB and LSB components that can be independently processed. During decoding, these portions are recombined through simpler operations rather than requiring high precision multiplication. This segmentation reduces computational complexity while maintaining the bit efficiency benefits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary organization of the code space by pre-defining the MSB and LSB boundaries and their respective bit allocations. This preliminary structuring allows subsequent encoding and decoding operations to proceed with simpler, pre-planned steps rather than requiring complex real-time calculations, thereby reducing computational complexity while preserving bit utilization efficiency.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If vector lengths correspond to DSP register length or even multiple of DSP register length, then implementation becomes practical, but bit allocation inefficiency occurs when n is not a power of two

Engineering Contradiction:
Improveimplementation practicalityVSAvoidbit utilization efficiency
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The patent segments the code representation into MSB and LSB portions that can be independently managed. This segmentation allows the system to work with practical vector lengths that align with DSP register requirements while simultaneously optimizing bit allocation for non-power-of-two frame counts. The MSB portion handles the primary indexing with efficient bit usage, while the LSB portion accommodates the remainder, together achieving both implementation practicality and bit efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different bit allocation strategies to different parts of the code structure. The MSB portion uses a bit allocation optimized for the majority of frames, while the LSB portion handles the remaining cases. This local optimization allows the system to maintain practical vector lengths for DSP implementation while achieving efficient overall bit utilization that adapts to the specific value of n, rather than forcing a uniform allocation that would waste bits.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8207875B2Encoder that optimizes bit allocation for information sub-parts
Publication Date: 2012.06.26 GOOGLE TECHNOLOGY HOLDINGS LLC
  • US8207875B2 patent drawing
  • US8207875B2 patent drawing
  • US8207875B2 patent drawing

AI summary

A encoder/decoder architecture (200, 300, 700) that uses an arithmetic encoder (220) to encode the MSB portions of the output of a Factorial Pulse Coder (212), that encodes the output of a first-level source encoder (210), e.g., MDCT. Sub-parts (e.g., frequency bands) of portions (e.g., frames) of the signal are suitably sorted in increasing order based on a measure related to signal energy (e.g., signal energy itself). Doing this in a system (100) that overlays Arithmetic Encoding on Factorial Pulse coding results in bits being re-allocated to bands with higher signal energy content, ultimately yielding higher signal quality and higher bit utilization efficiency.