Audio Processor Internal Clocking for Stable Sample Rate Conversion

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Solution Overview

Problem

Digital audio processing systems face challenges in maintaining synchronization and accuracy of sample rates across multiple audio streams due to varying reference clocks, often requiring external oscillators that may not be available or efficient, leading to issues like 'glitches' and electromagnetic interference.

Innovation Solution

An audio processing integrated circuit with an internal high-frequency LC oscillator generates an intermediate sample rate, using a programmable divider to adjust for process, voltage, and temperature variations, and incorporates asynchronous sample rate converters to ensure stable and accurate synchronization of input and output streams.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If an external crystal oscillator is used to provide the master clock, then the sample rate accuracy and synchronization are improved, but the pin count and external component count increase

Engineering Contradiction:
Improvesample rate accuracyVSAvoidexternal component count
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent integrates the oscillator functionality directly into the audio processing IC, merging the clock generation function with the audio processing unit. This eliminates the need for separate external crystal oscillators and reduces the overall component count while maintaining sample rate accuracy through internal calibration mechanisms.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The IC performs self-calibration using its own internal resources (ADC, DAC, and audio processing capabilities) to characterize and correct the frequency response of the integrated oscillator. This self-service approach allows the device to compensate for its own oscillator's inaccuracies without requiring external reference components.

Inventive Principle:
Principle #25Self-service

2Quantity of substance

If an internal RC or LC oscillator is used, then the pin count and external component count are reduced, but the frequency accuracy and stability deteriorate due to process, voltage, and temperature variations

Engineering Contradiction:
Improveexternal component countVSAvoidfrequency accuracy
Core Design Contradiction:
Quantity of substanceVSMeasurement precision

Solution Approach 1:

The patent implements a feedback-based calibration system where the IC measures its own oscillator's output frequency using internal ADC/DAC circuits and adjusts the oscillator's operating parameters accordingly. This closed-loop feedback mechanism compensates for PVT variations and maintains frequency accuracy despite using integrated oscillators.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The calibration process dynamically adjusts oscillator parameters (such as capacitor values or inductor ratios) based on measured frequency deviations. By changing these parameters in response to PVT conditions, the system maintains stable frequency output from the integrated oscillator.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If a high-frequency master clock is distributed externally, then the sample rate conversion accuracy is improved, but the power consumption and electromagnetic interference increase

Engineering Contradiction:
Improvesample rate conversion accuracyVSAvoidelectromagnetic interference
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent combines the master clock generation and distribution within the IC package, eliminating the need for external high-frequency clock distribution traces. This integration reduces electromagnetic interference from external traces and connectors while maintaining sample rate conversion accuracy through controlled internal routing.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides a stable and accurate internal master clock generator, reducing the need for external components, minimizing electromagnetic interference, and maintaining synchronization across multiple audio streams while accommodating variations in temperature and voltage, thus preventing glitches and ensuring high-frequency information integrity.

Implementation Method 1

an internal high-frequency LC oscillator

Methodology Applied
Scientific EffectLC oscillation: Resonance

Implementation Method 2

A divider divides the output of the internal high-frequency LC oscillator to generate the intermediate sample rate

Methodology Applied
Scientific EffectFrequency division:

Implementation Method 3

asynchronous sample rate converters to ensure stable and accurate synchronization

Methodology Applied
Scientific EffectSample rate conversion:

Data Source

PatentUS8452429B2Audio processor with internal oscillator-generated audio intermediate frequency reference
Publication Date: 2013.05.28 CIRRUS LOGIC INC
  • US8452429B2 patent drawing
  • US8452429B2 patent drawing
  • US8452429B2 patent drawing

AI summary

An integrated circuit audio processor having an internal-oscillator generated intermediate frequency reference provides for operation of an audio processor without requiring an external master clock. Input audio streams are sample-rate converted to an intermediate sample rate derived from the internal oscillator, which may be an LC oscillator. One or more output audio streams are generated from the one or more input audio streams at the intermediate sample rate and are converted from the intermediate sample rate to corresponding output sample rates. A divider generates the intermediate sample rate from the oscillator output, and is programmed to control the intermediate sample rate to ensure that the intermediate sample rate is in the proper range for operation of the integrated circuit. The divider can be programmed to accommodate changes in process, voltage and/or temperature of the IC, so that the intermediate sample rate is maintained near an expected frequency.