Audio Processor Interrupt Decimation for CPU Load Reduction
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Solution Overview
Problem
In information processing systems, the frequent generation of interrupt signals due to DMA transfers between main memory and input/output devices increases CPU load and latency, particularly when multiple interrupt signals contend for a single interrupt signal line, degrading data transfer efficiency.
Innovation Solution
An information processing apparatus with a processor and audio processing unit connected by a bus, featuring a ring buffer and an interrupt signal generator that decimates interrupt signals based on the sampling frequency of audio data, reducing the frequency of interrupt signals and improving data transfer efficiency by only supplying surviving interrupt signals to the processor for initiating data transfers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If interrupt signals are generated for every buffer empty/full state, then data transfer responsiveness is improved, but CPU load increases and data transfer efficiency degrades
Solution Approach 1:
The interrupt signal generator decimates interrupt signals based on periodic intervals determined by the sampling frequency of audio data. Instead of generating interrupts for every buffer state change, it generates interrupts at periodic intervals (e.g., every N-th buffer empty/full event), reducing interrupt frequency while maintaining adequate data transfer responsiveness for audio applications.
2Device complexity
If multiple interrupt signals contend for a single interrupt signal line, then system simplicity is maintained, but interrupt signal propagation delay increases
Solution Approach 1:
The interrupt signal generator extracts and decimates interrupt signals before they are sent to the CPU, removing excess interrupt signals that would cause contention on the interrupt signal line. By filtering out redundant interrupts at the source, the system maintains a simple single-line interrupt structure while reducing propagation delays caused by signal contention.
3Productivity
If interrupt frequency is reduced by decimation, then CPU load is reduced and data transfer efficiency is improved, but interrupt signal responsiveness may be degraded
Solution Approach 1:
The system changes the parameter of interrupt signal frequency by applying decimation based on the audio data sampling frequency. The decimation ratio is adjusted according to the specific audio application requirements, allowing optimization between CPU load reduction and interrupt responsiveness. The ring buffer size and decimation factor are tuned to maintain adequate responsiveness for the specific audio use case.
Data Source
AI summary
There is provided an information processing apparatus in which a CPU and an audio processing unit are coupled by a bus. The audio processing unit includes a ring buffer that temporarily retains audio data, and performs an input/output process of the audio data. An interrupt signal generator generates a buffer empty signal, when the audio data is output from a buffer in the ring buffer and the buffer is empty, decimates the buffer empty signal in accordance with a sampling frequency of audio, and then feeds the interrupt signal that survives the decimation to the CPU. The CPU, upon receiving the buffer empty signal, issues a DMA transfer instruction for writing the audio data into the empty buffer in the ring buffer.