Audio Processor PLL Clock Sharing for Smaller Mobile Audio Circuits
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Solution Overview
Problem
Mobile phones require higher performance and reduced power consumption for audio playback, with existing solutions not adequately addressing the need for miniaturization and efficient circuit size reduction while maintaining advanced audio playback functions.
Innovation Solution
A semiconductor device and audio processor chip configuration that includes a first D/A converter circuit, a clock generation circuit, and a PLL circuit, where the PLL circuit generates a clock signal for the D/A converter and outputs it externally, allowing the audio processor to operate independently and reducing the need for additional clock generation circuits, thereby minimizing circuit size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If an audio processor is added to enable advanced audio playback functions, then audio performance is improved, but device complexity and circuit size increase
Solution Approach 1:
The clock generation circuit is designed to serve dual purposes: it generates clock signals for the audio processor's D/A converter and simultaneously outputs the clock signal externally to serve as a master clock for other circuits. This multi-functional design eliminates the need for separate clock generation circuits, thereby improving audio playback capability while minimizing the increase in circuit size
2Reliability
If a separate clock generation circuit is provided for the audio processor, then clock signal stability is improved, but circuit size increases
Solution Approach 1:
The clock generation circuit within the audio processor is designed to perform multiple functions: generating stable clock signals for the internal D/A converter and simultaneously providing external clock output as a master clock signal. This eliminates the need for additional separate clock generation circuits while maintaining clock signal stability
Solution Approach 2:
The patent merges the clock generation function into the audio processor chip itself, combining what would traditionally be separate components (audio processor and dedicated clock generation circuit) into a single integrated unit. This reduces the overall circuit size while ensuring stable clock signal generation for both internal and external use
Data Source
AI summary
An audio processor chip includes a DSP for decoding audio data, a first DAC for performing a D/A conversion to the digital data obtained from the DSP, a PLL circuit for generating a clock signal for the first DAC to supply it to the first DAC and a clock output external terminal for outputting the clock signal obtained from the PLL circuit to a second DAC of an AFE. The first DAC 142 outputs an analog signal obtained from the D/A conversion to an analog mixer and the analog mixer performs a mixing process to the analog signal to output.