Audio Rate Converter with Anti-Alias Filtering and Gated Clock
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Solution Overview
Problem
Conventional rate converters face challenges in producing output signals with high Signal-to-Noise Ratio (SNR) and flat frequency response, particularly in audio signals, due to aliasing issues during resampling.
Innovation Solution
The proposed rate converter system includes a 6-channel forward path with 24-bit signal paths and a 2-channel reverse path with 16-bit signal paths, utilizing a gated clock in low-power mode, and employs a simplified conversion rate tracking loop with a 1st order IIR filter and 3rd order polynomial-based anti-alias filters to achieve high SNR and alias rejection across various sample rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional rate converters use standard resampling methods, then the conversion process is simple, but the output signal suffers from aliasing and low SNR
Solution Approach 1:
The patent applies preliminary anti-alias filtering before resampling to prevent aliasing artifacts from entering the conversion process. The anti-alias filter is designed with specific pole locations to achieve the required attenuation before the signal is downsampled, ensuring high SNR in the output without requiring complex post-processing
Solution Approach 2:
The patent introduces an intermediary anti-alias filter stage between the input signal and the resampling operation. This filter acts as a mediator that selectively attenuates frequency components that would cause aliasing, allowing the simple resampling operation to produce high-quality output without direct complex processing
2Object-affected harmful factors
If conventional rate converters use high-order filters to reduce aliasing, then alias rejection improves, but computational complexity and power consumption increase
Solution Approach 1:
The patent changes the parameters of the anti-alias filter by optimizing the pole locations in the z-plane to achieve maximum attenuation with minimum filter order. By carefully selecting the pole angles and radii, the filter achieves the required alias rejection with fewer computational operations, reducing power consumption while maintaining effective aliasing suppression
Solution Approach 2:
The patent converts the potentially harmful aliasing frequencies into attenuated components by strategically placing filter poles to coincide with or near the alias frequencies. This transforms the aliasing problem into a benefit where the filter's natural response characteristics are used to suppress the harmful frequencies efficiently
3Measurement precision
If conventional rate converters process audio signals through multiple computation blocks, then conversion accuracy is maintained, but latency variation increases
Solution Approach 1:
The patent merges the anti-alias filtering and resampling operations into a unified processing stage. By combining these functions and using an optimized filter structure, the patent reduces the number of separate computation blocks and their associated buffer operations, thereby maintaining conversion accuracy while reducing latency variation
Data Source
AI summary
Embodiments of the invention may be used to implement a rate converter that includes: 6 channels in forward (audio) path, each channel having a 24-bit signal path per channel, an End-to-end SNR of 110 dB, all within the 20 Hz to 20 KHz bandwidth. Embodiment may also be used to implement a rate converter having: 2 channels in a reverse path, such as for voice signals, 16-bit signal path per channel, an End-to-end SNR of 93 dB, all within 20 Hz to 20 KHz bandwidth. The rate converter may include sample rates such as 8, 11.025, 12, 16, 22.05, 24, 32 44.1, 48, and 96 KHz. Further, rate converters according to embodiments may include a gated clock in low-power mode to conserve power.