Audio Restore Circuit With Dynamic Clock Tracking for Multi-Channel Output
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Solution Overview
Problem
Existing audio restore circuits face challenges in accurately restoring multi-channel audio signals from a single-channel integrated audio signal due to the critical dependence on the clock rate of the audio clock signal, which is not efficiently adjusted in existing technologies, often requiring costly high-speed processors and large SRAM for effective data tracking.
Innovation Solution
An audio restore circuit comprising an audio tracking circuit, a clock adjustment circuit, and an audio generator circuit that adjusts the clock rate of the audio clock signal based on control signals generated from the sampling rate and data water levels, eliminating the need for high-speed processors and large SRAM by using phase-locked loops and FIFO storage, thereby optimizing clock rate adjustments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high-speed processors and large SRAM are used for effective data tracking, then audio signal restoration accuracy is improved, but device complexity and cost increase
Solution Approach 1:
The patent changes the operating parameters by using a low-speed processor that operates at reduced clock rates, coupled with a FIFO buffer that temporarily stores audio data. This parameter change allows the system to achieve the same data tracking effectiveness as high-speed processors by buffering data during clock rate transitions, thereby reducing processor speed requirements while maintaining restoration accuracy
Solution Approach 2:
The FIFO (First-In-First-Out) buffer acts as an intermediary between the low-speed processor and the audio data stream. It temporarily holds audio samples when clock rates differ, allowing the low-speed processor to process data at its own pace while preventing data loss or corruption. This intermediary component enables accurate audio restoration without requiring high-speed processing
2Measurement precision
If clock rate is dynamically adjusted based on sampling rate, then audio signal restoration accuracy is improved, but energy consumption increases
Solution Approach 1:
The system dynamically adjusts the clock rate of the audio clock signal based on the relationship between the sampling rate and the desired output rate. The clock adjustment circuit modifies the clock frequency in real-time to match processing requirements, allowing the processor to operate at lower average speeds while maintaining accuracy when needed, thereby reducing overall energy consumption
Solution Approach 2:
The system employs feedback mechanisms where the clock adjustment circuit continuously monitors the sampling rate and adjusts the audio clock signal accordingly. This feedback control ensures that the processor only increases clock speed when necessary for accurate restoration, rather than maintaining high speed continuously, thus reducing energy consumption while preserving restoration accuracy
3Productivity
If clock rate adjustment is implemented, then productivity is improved, but device complexity increases
Solution Approach 1:
The patent replaces complex mechanical or high-speed electronic processing systems with a simpler combination of a low-speed processor and a FIFO buffer. The clock adjustment circuit uses basic electronic components to modify clock frequency, substituting the need for complex high-speed processing hardware. This substitution maintains processing efficiency while significantly reducing device complexity
Data Source
AI summary
An audio restore circuit includes an audio tracking circuit, a clock adjustment circuit, and an audio generator circuit. The audio tracking circuit is configured to generate a first control signal according to a sampling rate of an audio sampled signal and a clock rate of an audio clock signal. The clock adjustment circuit is configured to adjust the clock rate of the audio clock signal according to the first control signal. The audio generator circuit is configured to output a plurality of audio output signals according to the audio sampled signal and the audio clock signal.


