Selective Wet Etching of AuSn Solder Layers
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Solution Overview
Problem
Current methods for patterning composite gold-tin (AuSn) solder materials in semiconductor devices are limited by the need for selective area deposition, which can lead to contamination, thickness constraints, and high costs, restricting the range of possible device architectures and desiring a cleaner, more efficient patterning process.
Innovation Solution
A post-deposition wet etch process using a combination of standard chemistries such as aqua regia, hydrofluoric acid (HF), and nitric acid (HNO3) to selectively etch AuSn solder layers, allowing for submicron patterning and compatibility with standard cleanroom processes, enabling patterning before or after reflow and under bump metallization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If selective area deposition is used to pattern AuSn solder, then patterning can be achieved, but contamination occurs and thickness constraints are imposed
Solution Approach 1:
Instead of using selective area deposition to create patterns directly, the patent inverts the approach by depositing a complete AuSn layer and then using selective wet etching to remove unwanted areas. This inversion eliminates contamination issues associated with selective deposition while achieving the same patterning result.
Solution Approach 2:
The patent introduces photoresist as an intermediary masking layer that enables precise patterning during the wet etching process. The photoresist protects desired AuSn regions while allowing etching of unwanted areas, achieving submicron patterning precision without the contamination problems of selective deposition.
2Manufacturing precision
If selective area deposition is used to pattern AuSn solder, then patterning can be achieved, but thickness constraints are imposed
Solution Approach 1:
The patent inverts the patterning approach from selective deposition to selective etching of a complete layer. This allows the AuSn layer to be deposited with uniform, controllable thickness using standard deposition techniques, then patterned afterward without thickness constraints.
Solution Approach 2:
The patent separates the deposition and patterning operations into distinct steps: first depositing a complete AuSn layer with controlled thickness, then applying photoresist masking and performing selective wet etching. This segmentation allows independent optimization of thickness control and patterning precision.
3Manufacturing precision
If selective area deposition is used to pattern AuSn solder, then patterning can be achieved, but device architecture flexibility is restricted
Solution Approach 1:
By inverting from selective deposition to complete deposition followed by selective etching, the patent enables greater device architecture flexibility. The complete AuSn layer can be formed first, then patterned into various shapes and configurations using photoresist masks, allowing complex device designs without being constrained by deposition technique limitations.
Solution Approach 2:
The patent changes the fundamental parameter of the patterning process from controlling deposition location to controlling etching removal. This parameter change enables flexible device architectures by allowing the AuSn layer to be deposited uniformly and then selectively removed to create various patterns, shapes, and configurations suitable for different device designs.
4Manufacturing precision
If selective area deposition is used to pattern AuSn solder, then patterning can be achieved, but process cost increases
Solution Approach 1:
The patent uses photoresist as a disposable masking layer that is applied, used for patterning, and then removed. This inexpensive consumable material enables precise patterning through wet etching without the high costs associated with selective area deposition equipment and processes.
Solution Approach 2:
The patent replaces the complex mechanical/equipment-based selective area deposition system with a simpler chemical wet etching process using photoresist masks. This substitution reduces equipment costs and process complexity while achieving comparable or superior patterning precision through standard cleanroom-compatible chemical processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for precise, cost-effective patterning of AuSn solder with submicron features, eliminating contamination and thickness constraints, and enabling complex shapes, while being compatible with existing fabrication processes, thus expanding the range of possible device architectures.
Implementation Method 1
Wet etching (chemical etching, chemical milling) is a patterning process used in semiconductor fabrication that removes a material by relying on chemical reactions in the liquid phase. The process typically uses acids, bases or other chemicals to dissolve away unwanted materials.
Implementation Method 2
Aqua regia is a well known chemistry for etching gold and is surprisingly effective for etching AuSn solder.
Implementation Method 3
HF is effective for etching many metals and can be used alone or in combination with other chemistries such as aqua regia and/or nitric acid to etch AuSn.
Implementation Method 4
nitric acid (HNO3) and combinations thereof to selectively etch AuSn solder layers
Data Source
AI summary
The present invention is directed to post-deposition, wet etch processes for patterning AuSn solder material and devices fabricated using such processes. The processes can be applied to uniform AuSn layers to generate submicron patterning of thin AuSn layers having a wide variety of features. The use of multiple etching steps that alternate between different mixes of chemicals enables the etch to proceed effectively, and the same or similar processes can be used to etch under bump metallization. The processes are simple, cost-effective, do not contaminate equipment or tools, and are compatible with standard cleanroom fabrication processes.