Authenticated Encryption Module with IV-Misuse Resistance

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Solution Overview

Problem

Existing authenticated encryption technologies, such as AES-GCM, are inefficient and lack IV-misuse resistance, particularly in constraint devices like IoT devices and smart TVs without hardware acceleration, where performance and security are compromised.

Innovation Solution

A novel authenticated encryption module utilizing the Poly1305 function in conjunction with AES for generating synthetic initialization vectors (SIVs), providing improved IV-misuse resistance and faster computation speeds by acting as a cryptographic pseudo-random function (PRF) to encrypt messages and generate pseudorandom initialization vectors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If AES-GCM is used for authenticated encryption, then data authentication and integrity are provided, but encryption and decryption speeds are slow in constraint devices without hardware acceleration

Engineering Contradiction:
Improveencryption and decryption speedVSAvoiddata authentication and integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The encryption system is segmented into two independent but coordinated components: Poly1305 handles authentication tag generation with high software efficiency, while AES-CTR handles the actual encryption/decryption. This segmentation allows each component to be optimized for its specific function, with Poly1305 providing fast authentication without requiring hardware acceleration.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A synthetic initialization vector (SIV) serves as an intermediary element that connects the authentication and encryption processes. The SIV is generated by encrypting a counter value with the authentication key, and it is used both for Poly1305 authentication and as the initialization vector for AES-CTR encryption, thereby coordinating both operations efficiently.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If conventional IV generation methods are used in AES-GCM, then encryption is performed, but IV-misuse resistance is lacking leading to security vulnerabilities

Engineering Contradiction:
ImproveIV-misuse resistanceVSAvoidIV generation mechanism
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system performs preliminary action by generating a synthetic initialization vector (SIV) before the main encryption process. The SIV is created by encrypting a counter value with the authentication key using Poly1305, ensuring that the IV is uniquely tied to the authentication process and provides inherent misuse resistance without requiring complex additional mechanisms.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The authentication key and encryption key are merged into a single cryptographic primitive operation. The same Poly1305 function with the authentication key is used to generate both the authentication tag and the synthetic initialization vector, simplifying the key management while enhancing security.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If Poly1305 with AES-CTR is used for authenticated encryption, then encryption and decryption speeds improve by about 30%, but a novel IV generation mechanism is required

Engineering Contradiction:
Improveencryption and decryption speedVSAvoidIV generation mechanism
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system changes the parameter of IV generation from conventional random or counter-based methods to a synthetic IV derived from cryptographic operations. By using the Poly1305 function to encrypt a counter value with the authentication key, the IV generation becomes tightly integrated with the authentication process, ensuring uniqueness and security while maintaining software efficiency.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11838424B2Authenticated encryption apparatus with initialization-vector misuse resistance and method therefor
Publication Date: 2023.12.05 HUAWEI TECH CO LTD
  • US11838424B2 patent drawing
  • US11838424B2 patent drawing
  • US11838424B2 patent drawing

AI summary

A module has a processor for executing an encryption process to encrypt a message to a cipher-text with authentication. The encryption process includes generating a tag from a secret message authentication code (MAC) key, a nonce, a message, and optionally an additional data using a Poly1305 function, generating a pseudorandom initialization vector (IV) from a secret encryption key and the tag using a first encryption function, and generating a cipher-text from the secret encryption key, the generated IV, and the message using a second encryption function. The module or a similar module may execute a corresponding decryption process to decrypt the cipher-text to a decrypted message and verify the authenticity of the cipher-text. At least one of the first and second encryption functions may be an Advanced Encryption Standard (AES) encryption function such as an AES-CTR encryption function, an AES-like encryption function, and/or other suitable encryption functions.