Authenticated Encryption for Off-Chip Memory Data Protection
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Solution Overview
Problem
Existing memory data protection technologies face challenges in securing off-chip memory against attacks like bus probing and memory tampering, with traditional methods experiencing performance degradation and high storage overhead, and being unfeasible for protecting large-capacity off-chip memory.
Innovation Solution
The implementation of authenticated encryption (AE) with modified authentication codes, iterative re-encryption, and data freshness control using timestamp values, along with prefix coding and counter management to ensure confidentiality, integrity, and authenticity with reduced memory overhead and latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional hash-tree technologies are used for memory integrity, then data integrity protection is provided, but performance degradation and high storage overhead occur
Solution Approach 1:
The patent extracts the integrity verification mechanism from traditional hash-tree approaches and implements it directly within the memory controller using authenticated encryption. By taking out the need for complex tree structures and moving the verification logic into the memory controller, the system achieves integrity protection without the performance degradation and storage overhead associated with off-chip hash verification.
Solution Approach 2:
The patent replaces the mechanical/hash-based integrity verification system with a cryptographic authenticated encryption system. This substitution uses cryptographic primitives (encryption with authentication tags) instead of traditional hash functions and tree structures, providing both confidentiality and integrity verification in a more efficient manner that reduces performance overhead.
2Reliability
If traditional hash-tree technologies are used for memory integrity, then data integrity protection is provided, but storage overhead increases
Solution Approach 1:
The patent merges the confidentiality encryption and integrity verification functions into a single authenticated encryption operation. By combining these two separate functions into one unified cryptographic primitive, the system eliminates the need for separate hash values and tree structures, significantly reducing storage overhead while maintaining both data confidentiality and integrity protection.
Solution Approach 2:
The authenticated encryption mechanism serves multiple functions simultaneously: it provides data confidentiality through encryption, data integrity verification through authentication tags, and data freshness verification through nonce management. This multi-functionality eliminates the need for separate mechanisms for each security requirement, reducing overall storage overhead.
3Reliability
If all off-chip memory data is protected using traditional integrity technologies, then comprehensive protection is achieved, but SRAM capacity is exceeded
Solution Approach 1:
The patent segments the integrity verification process into two parts: authentication tags are stored in the large-capacity off-chip memory along with the encrypted data, while only the cryptographic keys and minimal verification state are maintained in the limited SRAM within the memory controller. This segmentation allows comprehensive protection of all off-chip memory without exceeding SRAM capacity constraints.
Solution Approach 2:
The patent moves the bulk of the integrity verification data (authentication tags) from the constrained SRAM dimension to the abundant off-chip memory dimension. By changing where the verification data is stored from on-chip SRAM to off-chip memory, the system can provide comprehensive protection for large memory capacities without being limited by small SRAM size.
Data Source
AI summary
Systems, apparatus, and/or methods to provide memory data protection. In one example, authenticated encryption may be enhanced via a modification to an authentication code that is associated with encrypted data. The authentication code may be modified, for example, with a nonce value generated for a particular write to memory Decrypted data, generated from the encrypted data, may then be validated based on a modified authentication code. Moreover, data freshness control for data stored in the memory may be provided based on iterative authentication and re-encryption. In addition, a counter used to provide a nonce value may be managed to reduce a size of the counter and/or a growth of the counter.