Authentication Timers Using Power-Limited Prover Chips
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Solution Overview
Problem
Existing authentication systems face challenges in distinguishing authentic from counterfeit chips during challenge-response protocols, particularly due to differences in power consumption patterns that are difficult to replicate in counterfeit manufacturing.
Innovation Solution
The system employs a power limited power supply to the prover chip, allowing the verifier chip to measure the time interval between the challenge and response messages while ensuring the prover chip's power consumption remains within a predetermined limit, approximating that of an authentic chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power consumption limits are applied to the prover chip, then authentic chips can be differentiated from counterfeit chips, but the authentication system becomes more complex
Solution Approach 1:
A host system acts as an intermediary between the verifier and prover chips. The host controls the power supply to the prover, limiting its power consumption during authentication. This intermediary manages the power constraints without requiring direct modification of the prover chip design, thus improving authentication reliability while minimizing added complexity.
Solution Approach 2:
The system changes the power consumption parameter of the prover chip during authentication by controlling the power supply. The host adjusts power delivery to match expected consumption patterns of authentic chips, creating a measurable distinction between authentic and counterfeit devices without fundamentally altering the chip architecture.
2Reliability
If response time measurement is used for authentication, then counterfeit chips can be identified, but the authentication protocol becomes more complex
Solution Approach 1:
The verifier measures the response time from the prover and compares it against expected time windows for authentic chips. This feedback mechanism provides an additional verification layer that identifies counterfeit chips based on their inability to meet timing requirements, improving authentication accuracy while adding only a single measurement step to the protocol.
3Reliability
If power consumption is limited during authentication, then authentic chips are verified more accurately, but counterfeit chips may fail to respond
Solution Approach 1:
The power supply to the prover is limited to a level that is sufficient for authentic chips to complete their authentication calculations but excessive for counterfeit chips to replicate. This partial power provision creates a clear distinction: authentic chips succeed within the power and time constraints, while counterfeit chips fail due to insufficient resources, thereby maintaining high authentication accuracy without unfairly penalizing legitimate devices.
Data Source
AI summary
A first device transmits a first message to a second device as part of a challenge-response protocol in order to authenticate the second device. A power limited power supply coupled to the second device limits power consumption by the second device during the second device's challenge-response protocol calculations. The first device measures a response time of the second device during the challenge-response protocol. The authentication of the second device is based on the response time of the second device while it has limited power consumption.