Auto-Biased Level Shifter for Wide-Voltage Overvoltage Protection
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Solution Overview
Problem
Conventional level shifters experience high latency, inconsistent performance, and distorted duty cycles in high-speed interface applications due to their inability to effectively handle extreme voltage levels and provide reliable overvoltage protection across varying conditions.
Innovation Solution
A level-shifting circuit design incorporating both thin and thick oxide devices with an auto-biased overvoltage protection circuit, which uses cross-coupled transistors to select the highest voltage and provide it to the gates of NMOS transistors for overvoltage protection, allowing operation across a wide input voltage range without additional power impact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional level shifters are used to interface between low and high voltage sections, then voltage level shifting is achieved, but high latency and inconsistent performance occur in high-speed interface applications
Solution Approach 1:
The patent implements dynamic control of the level shifter operation by using the higher voltage signal itself to control the switching of transistors. The circuit adapts its operation mode based on the input signal voltage level, enabling fast signal transition when voltage levels are appropriate while maintaining protection when they are not, thus reducing latency in high-speed applications.
Solution Approach 2:
The patent introduces an intermediate overvoltage protection circuit that acts as a mediator between the high voltage section and the low voltage section. This intermediate circuit includes transistors and diodes that conditionally connect or disconnect based on voltage levels, enabling fast signal passing when safe while blocking when dangerous, thus resolving the latency issue.
2Speed
If conventional level shifters are used to interface between low and high voltage sections, then voltage level shifting is achieved, but distorted duty cycle occurs in high-speed interface applications
Solution Approach 1:
The patent implements a feedback mechanism where the output voltage level is monitored and fed back to control the switching of transistors in the level shifter. The overvoltage protection circuit uses the higher voltage signal to control the gates of NMOS transistors, creating a feedback loop that ensures the duty cycle is maintained accurately during high-speed transitions, preventing distortion.
3Adaptability or versatility
If the input voltage range is expanded to accommodate extreme voltage levels, then compatibility with different voltage sections is improved, but reliability decreases due to overvoltage stress on transistors
Solution Approach 1:
The patent applies preliminary anti-action by implementing an overvoltage protection circuit that proactively prevents overvoltage stress on transistors before it can cause damage. The circuit uses diodes and transistors to detect potential overvoltage conditions and blocks or redirects the voltage before it reaches vulnerable components, thus maintaining reliability while allowing wide input voltage range.
Solution Approach 2:
The patent introduces an intermediate overvoltage protection circuit that acts as a mediator between the high voltage section and the low voltage section. This intermediate circuit includes transistors and diodes that conditionally connect or disconnect based on voltage levels, enabling fast signal passing when safe while blocking when dangerous, thus resolving the latency issue.
4Reliability
If overvoltage protection circuits are added to protect transistors from overvoltage stress, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent merges the overvoltage protection function with the existing level shifter circuitry by using the same transistors and diodes that perform voltage level shifting also provide overvoltage protection. The overvoltage protection is not a separate independent circuit but is integrated into the level shifter's transistor gates, thus improving reliability without significantly increasing device complexity.
Data Source
AI summary
Certain aspects of the present disclosure generally relate to a level-shifting circuit. The level-shifting circuit generally includes a first pull-up path having at least one first diode and at least one first transistor, and a second pull-up path having at least one second diode and at least one second transistor. The level-shifting circuit may also include a first pull-down path having a third transistor and a fourth transistor, wherein the fourth transistor is coupled between the third transistor and the first diode; a second pull-down path having a fifth transistor and a sixth transistor, wherein the sixth transistor is coupled between the fifth transistor and the second diode; and an overvoltage protection circuit coupled to gates of the fourth transistor and the sixth transistor.