Auto-Response Unit for Deterministic SOC Testing
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Solution Overview
Problem
Existing methods for testing systems on a chip are inefficient due to the disparity between tester speeds and double data rate (DDR) memory exchanges, leading to impractical stretch mode techniques and high memory requirements for write data always response (WDAR) mode, which result in poor quality assurance and significant tuning challenges.
Innovation Solution
An auto-response unit is fabricated on the chip to collect signatures of transactions and provide deterministic responses, allowing for effective testing of chip components by acting between the memory controller and memory ports, using a signature collector and read-response module to accumulate and verify checksums, and convert physical to logical addresses for accurate testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If stretch mode is used to match tester speed with DDR memory exchange speed, then speed matching is achieved, but the interface complexity and command bubble duration increase significantly
Solution Approach 1:
An auto-response unit is introduced as an intermediary component between the memory controller and memory ports. This unit includes a signature collector and read-response module that automatically generate deterministic responses to read requests, eliminating the need for complex external tester interfaces and stretch mode operations.
Solution Approach 2:
The memory system performs self-testing through the auto-response unit that autonomously collects signatures of transactions and provides deterministic responses without requiring external tester intervention. This self-service capability simplifies the testing interface and eliminates the complexity of stretch mode while maintaining effective quality assurance.
2Reliability
If WDAR mode is used for testing, then quality assurance is improved, but memory requirements increase to 128 cache lines
Solution Approach 1:
The testing functionality is extracted from the main memory system by implementing a dedicated auto-response unit with signature collection capability. This separates the testing function from general memory operations, allowing effective quality assurance without requiring 128 cache lines of additional memory in the main memory system.
Solution Approach 2:
The auto-response unit serves multiple functions: it acts as a memory response unit providing deterministic responses to read requests, a signature collector accumulating transaction signatures, and a test mode controller. This multi-functionality achieves comprehensive quality assurance without the excessive memory requirements of traditional WDAR mode.
3Reliability
If WDAR mode is used for testing, then quality assurance is improved, but test time increases due to memory filling requirements
Solution Approach 1:
The auto-response unit pre-computes and stores deterministic response values in response value storage based on logical addresses before actual testing begins. This preliminary action eliminates the need to fill 128 cache lines with known data during testing, significantly reducing test time while maintaining quality assurance.
Solution Approach 2:
The system dynamically switches between normal operation mode and test mode through a mode selector. In test mode, the auto-response unit actively provides deterministic responses and collects signatures. This dynamic operation allows rapid testing without the static time penalty of pre-filling large memory structures required by traditional WDAR mode.
4Speed
If stretch mode is used for testing, then speed matching is achieved, but enormous tester tuning is required
Solution Approach 1:
The auto-response unit serves as an intermediary that absorbs the speed differential between the memory controller and external interfaces. By handling read requests internally and providing deterministic responses, it eliminates the need for stretch mode and the associated enormous tester tuning requirements.
Solution Approach 2:
The system performs self-testing with the auto-response unit autonomously managing transaction signature collection and response generation. This self-service capability eliminates the need for external testers and their complex tuning requirements, making the system easier to manufacture and deploy without extensive speed matching adjustments.
Data Source
AI summary
A method and system for high speed on chip testing for quality assurance. A multi-core system on a chip has a plurality of processing cores. The cores act as transaction agents with an auto-response unit fabricated on the chip at a chip boundary, the auto-response unit to provide a deterministic return value based on a logical address of a received read request.