Automated Assertion Generation for Hardware Design Verification

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Solution Overview

Problem

The manual effort required for assertion generation in hardware design is time-consuming and inefficient, particularly for complex temporal properties, leading to insufficient or excessive assertion sets that can result in incomplete design coverage or performance overhead.

Innovation Solution

A system that automates assertion generation by integrating data mining and static analysis, using decision tree-based supervised learning to derive candidate assertions from simulation data and filter them through formal verification, reducing human intervention and improving assertion quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If manual assertion generation is performed, then assertion quality and coverage can be improved through expert knowledge, but the time and resources required increase significantly

Engineering Contradiction:
Improveassertion coverageVSAvoidassertion generation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system enables self-service assertion generation by automatically mining simulation data to produce candidate assertions without requiring manual expert intervention. The data mining process autonomously identifies patterns and generates assertions that would traditionally require significant manual effort to create, thereby reducing time consumption while maintaining assertion quality through systematic analysis of design behavior

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent replaces the manual mechanical process of expert assertion writing with an automated computational system. Instead of relying on human experts to manually craft assertions based on their knowledge, the system uses data mining algorithms to automatically generate assertions from simulation data, substituting human cognitive effort with automated computational analysis

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If too many assertions are placed in the design, then design coverage is improved, but performance overhead increases unreasonably

Engineering Contradiction:
Improvedesign coverageVSAvoiddesign performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system applies partial action by generating a focused set of assertions that cover critical design behaviors without exhaustively covering every possible scenario. The data mining process identifies and generates only the most significant assertions from simulation data, avoiding the excessive generation of redundant or low-value assertions that would increase overhead without proportionally improving coverage

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system changes the parameter of assertion quantity from a manual estimation to a data-driven determination. By analyzing simulation data, the system automatically determines the appropriate number and type of assertions needed, adjusting the assertion set size based on actual design behavior patterns rather than arbitrary or overly conservative estimates

Inventive Principle:
Principle #35Parameter changes

3Productivity

If too few assertions are placed in the design, then performance overhead is reduced, but design coverage becomes insufficient

Engineering Contradiction:
Improvedesign performanceVSAvoiddesign coverage
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system uses feedback from simulation data to guide assertion generation. By monitoring actual design behavior during simulation, the data mining process receives feedback about which behaviors are critical and which assertions are needed, allowing the system to generate an appropriate number of assertions that ensures sufficient coverage without excessive overhead

Inventive Principle:
Principle #23Feedback

4Reliability

If temporal assertions are generated manually, then complex temporal properties can be captured, but the difficulty and time required increase significantly

Engineering Contradiction:
Improvetemporal property coverageVSAvoidassertion generation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces the complex manual process of reasoning about temporal relationships with automated data mining. Instead of requiring human experts to manually analyze and express complex temporal properties, the system automatically mines simulation data to identify temporal patterns and generate corresponding assertions, significantly reducing the complexity of handling temporal properties

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS9021409B2Integration of data mining and static analysis for hardware design verification
Publication Date: 2015.04.28 THE BOARD OF TRUSTEES OF THE UNIV OF ILLINOIS
  • US9021409B2 patent drawing
  • US9021409B2 patent drawing
  • US9021409B2 patent drawing

AI summary

A method of generating assertions for verification of a hardware design expressed at a register transfer level (RTL) includes running simulation traces through the design to generate simulation data; extract domain-specific information about the design for variables of interest; execute a data mining algorithm with the simulation data and the domain-specific information, to generate a set of candidate assertions for variable(s) of interest through machine learning with respect to the domain-specific information, the candidate assertions being likely invariants; conduct formal verification on the design with respect to each candidate assertion by outputting as invariants the candidate assertions that pass verification; iteratively feed back into the algorithm a counterexample trace generated by each failed candidate assertion, each counterexample trace including at least one additional variable in the design not previously input into the data mining algorithm, to thus increase coverage of a state space of the design.