Automated Integrated Circuit Design System for Non-Expert Engineers
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Solution Overview
Problem
The design and verification of integrated circuits typically require multiple specialized engineers and complex toolchains, making it time-consuming and inefficient, especially for non-experts who want to create custom processor or SoC designs.
Innovation Solution
A system that allows a single engineer to specify design parameters through a web interface or scripting API, automating the use of commercial EDA tools for design and verification, enabling the generation of register-transfer level data, software development kits, and physical designs, as well as facilitating manufacturing and testing of integrated circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple specialized engineers and complex toolchains are used for integrated circuit design and verification, then design reliability and completeness are improved, but design time and operational complexity increase significantly
Solution Approach 1:
The patent segments the integrated circuit design workflow into distinct modular stages (specification, synthesis, verification, implementation) that can be independently executed and automated. Each stage is handled by specialized software agents that work sequentially, reducing the need for multiple human engineers while maintaining verification reliability through systematic automated checking at each stage.
Solution Approach 2:
The patent introduces an automated design management system as an intermediary that coordinates between design specifications, EDA tools, and verification processes. This intermediary automatically schedules tasks, manages tool invocations, and integrates results, replacing the need for multiple specialized engineers to manually coordinate these processes.
2Manufacturing precision
If multiple specialized engineers and proprietary tool chains are used, then design precision and verification quality are improved, but device complexity and ease of operation deteriorate
Solution Approach 1:
The patent creates a universal automated design management system that can orchestrate multiple different EDA tool chains and verification tools through a single interface. The system translates high-level design specifications into tool-specific commands automatically, allowing one system to handle diverse toolchains without requiring users to understand their internal complexities.
Solution Approach 2:
The automated management system acts as an intermediary layer between the user and complex proprietary EDA tools. It handles tool invocation, parameter translation, and result integration, shielding users from toolchain complexity while maintaining access to specialized verification capabilities.
3Productivity
If automated EDA tool orchestration is implemented, then productivity and speed of design are improved, but the extent of automation required increases system complexity
Solution Approach 1:
The automated design management system implements self-service by automatically generating test cases, scheduling verification tasks, and integrating results without human intervention. The system monitors its own execution state and dynamically adjusts resource allocation, reducing the need for complex external control mechanisms while maintaining high productivity.
4Ease of operation
If a single engineer specifies design parameters through automated system, then ease of operation is improved, but design precision and verification quality may worsen without expert oversight
Solution Approach 1:
The system implements automated feedback loops where verification results are automatically analyzed and fed back to refine design parameters. The automated management system monitors verification quality metrics and can trigger re-verification or parameter adjustments, ensuring that designs meet precision requirements even without expert human oversight at each stage.
Data Source
AI summary
Systems and methods are disclosed for automated generation of integrated circuit designs and associated data. These allow the design of processors and SoCs by a single, non-expert who understands high-level requirements; allow the en masse exploration of the design-space through the generation processors across the design-space via simulation, or emulation; allow the easy integration of IP cores from multiple third parties into an SoC; allow for delivery of a multi-tenant service for producing processors and SoCs that are customized while also being pre-verified and delivered with a complete set of developer tools, documentation and related outputs. Some embodiments, provide direct delivery, or delivery into a cloud hosting environment, of finished integrated circuits embodying the processors and SoCs.