Automated Memory Description Generation for IC Testing
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Solution Overview
Problem
Current methods for testing integrated circuits are time-consuming and error-prone, as designers manually create descriptions to test physical memories, leading to incomplete testing and potential field returns due to the lack of accurate descriptions of physical memories and their enabling signals.
Innovation Solution
Automatically determining and generating a file that describes the association of physical memories with logical memories, including enabling conditions, to facilitate comprehensive testing using MBIST interfaces, reducing the need for manual input and improving testing accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If designers manually create descriptions of physical memories and their enabling signals, then testing can be performed, but the process is time-consuming and error-prone leading to incomplete testing
Solution Approach 1:
The system enables automatic generation of memory descriptions and enabling signal associations by synthesizing tool code that traverses the netlist and extracts memory information autonomously, eliminating the need for manual designer intervention while ensuring complete and accurate testing coverage
Solution Approach 2:
The invention performs automatic memory description generation and enabling signal identification during the synthesis phase before fabrication, preparing all necessary test information in advance to prevent field returns and reduce redesign cycles
2Adaptability or versatility
If manual methods are used to describe physical memories, then flexibility in design modification is maintained, but errors and omissions in testing descriptions occur
Solution Approach 1:
The system automatically traces enabling signals from logical memory interfaces through the netlist to physical memory instances, providing feedback verification that ensures accurate mapping between logical and physical memories while maintaining adaptability to design modifications
Solution Approach 2:
The invention replaces manual mechanical processes of creating and tracking memory descriptions with automated computer-based synthesis tools that systematically extract and verify memory information from netlists, eliminating human error while preserving design flexibility
3Reliability
If automatic determination of physical memories is implemented, then testing accuracy improves, but complexity of the automated system increases
Solution Approach 1:
The synthesis tool is enhanced with multi-functional capabilities to automatically perform netlist traversal, memory instance identification, enabling signal tracing, and test description generation, consolidating multiple functions into a single automated system that improves reliability without proportionally increasing complexity
Data Source
AI summary
A system and method automatically determines the physical memories inside a core or macro and their association with logical memories and their enabling signals. An integrated circuit (IC) source file that describes an integrated circuit in a hardware description language is received. The IC source file includes macros corresponding to memory. For each macro, a physical description file corresponding to the macro is generated. The description includes how the macro corresponds to the physical memory, associations of physical memories with the logical memory, enabling conditions, and data needed to test the memory.