Automated Stub Generation for Electronic Design Automation
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Solution Overview
Problem
The manual process of drawing and naming wire stubs for electronic design automation is laborious, requiring multiple operations for each connection, especially for designs with a large number of pins, and existing tools lack alignment with modern user interfaces and efficient signal name planning.
Innovation Solution
A computer-implemented method and system for generating stubs in electronic design automation, allowing for automatic stub generation, signal name assignment, and display, with features like bus tapping, stub rotation, and length adjustment based on signal name length, to streamline the connection process and improve productivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If manual wire stub drawing and naming is performed for each pin, then connection accuracy is maintained, but productivity deteriorates significantly
Solution Approach 1:
The patent segments the connection process into two distinct phases: (1) bulk generation phase where wire stubs are automatically created for multiple pins simultaneously using programmatic methods, and (2) refinement phase where signal names are assigned and connections are verified. This segmentation allows automated bulk operations to handle the majority of connections while manual intervention is reserved only for verification and naming, thereby resolving the contradiction between maintaining connection accuracy and improving productivity.
Solution Approach 2:
The patent applies preliminary action by pre-generating wire stubs for all pins before the actual connection work begins. The automated stub generation creates the structural framework of connections in advance, allowing designers to later focus on signal name assignment and verification without having to manually draw each connection line. This preliminary automated setup dramatically improves productivity while the subsequent manual review ensures connection accuracy.
2Reliability
If multiple operations are performed for each connection, then connection completeness is ensured, but time consumption increases
Solution Approach 1:
The patent merges multiple connection operations into a single automated process. Instead of requiring separate manual operations for drawing wire stubs, assigning signal names, and verifying connections, the system combines these tasks into an integrated workflow where automated stub generation is followed by batch signal name assignment. This merging reduces the time per connection while maintaining completeness through the structured multi-phase approach that ensures all necessary steps are completed.
Solution Approach 2:
The patent implements self-service by enabling the automated generation of wire stubs and signal name assignment without requiring manual intervention for each individual connection. The system performs these repetitive tasks autonomously, freeing the designer to focus on higher-level design decisions and verification. This self-service automation dramatically reduces time consumption while the built-in verification mechanisms ensure connection completeness.
3Adaptability or versatility
If traditional schematic tools are used, then compatibility with existing designs is maintained, but user interface modernity and efficiency are lost
Solution Approach 1:
The patent achieves universality by creating a multi-functional system that combines the capabilities of traditional schematic capture tools with modern programmatic design advantages. The system maintains compatibility with existing design formats and workflows while incorporating automated stub generation, batch signal name assignment, and modern verification capabilities. This multi-functionality allows designers to work with legacy designs using updated, more efficient methods, thereby maintaining adaptability while improving ease of operation.
Data Source
AI summary
The present disclosure relates to a computer-implemented method for visualization in an electronic design. The method may include providing an electronic design and receiving a selection of at least one pin associated with the electronic design at a first graphical user interface. The method may further include generating a stub for each of the selected pins at the first graphical user interface. The method may also include providing a second graphical user interface configured to allow for the assignment of a signal name to each stub. The method may include extending the stub for each of the selected pins to reach a target destination associated with the electronic design. The method may also include displaying the signal name for each stub on at least one of the first graphical user interface and the second graphical user interface.