Automatic IP Block Generation with DRC and LVS Compliance
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Solution Overview
Problem
Current methods for generating integrated circuit (IC) intellectual property (IP) blocks are inefficient, requiring extensive programming and maintenance, and are limited by predefined elements, lacking flexibility and the ability to modify layout patterns or electrical constraints, which hinders the design process.
Innovation Solution
A computer-implemented system and method for automatically generating IP blocks by obtaining manufacturing processes and design rules from external sources, defining electronic circuits, preparing circuit schematics, and generating compliant IP layouts, allowing for modification and use of machine learning to ensure correctness and compliance with DRC, LVS, and DFM constraints.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If script-based PCells are used for generating device layouts, then flexibility and adaptability are improved, but programming effort and device complexity increase significantly
Solution Approach 1:
The patent introduces an intermediary system that translates high-level device specifications into script-based PCell implementations automatically. This intermediary layer handles the programming complexity internally while presenting a simple interface to designers, thus maintaining flexibility without requiring users to write complex scripts.
Solution Approach 2:
The system enables self-service by allowing the generation of device layouts through automated script execution based on predefined templates and parameters. The scripting infrastructure serves itself by automatically generating the necessary layout code without requiring manual programming intervention for each device instance.
2Manufacturing precision
If manual design methods are used for IP blocks, then design precision and control are maintained, but design time and loss of time increase significantly
Solution Approach 1:
The patent applies preliminary action by pre-defining device templates, design rules, and layout patterns in a database before actual design needs arise. When a device is needed, the system retrieves and instantiates these pre-prepared templates with specific parameters, maintaining design precision while dramatically reducing the time required compared to manual design from scratch.
Solution Approach 2:
The system uses copying by replicating proven device layouts and design patterns through template instantiation. Instead of manually designing each device, the system copies verified design templates and adapts them to specific requirements through parameter substitution, ensuring precision while accelerating the design process.
3Ease of operation
If built-in device generators are used, then ease of operation is improved, but adaptability and versatility deteriorate due to predefined elements
Solution Approach 1:
The patent implements universality by creating a multi-functional device generator that combines the ease of built-in generators with the adaptability of script-based systems. The system can automatically generate layouts using predefined templates while also allowing customization through parameter modification and template extension, serving multiple design needs through a single unified tool.
Solution Approach 2:
The system applies dynamics by making the generator adaptable and configurable rather than static and fixed. Users can dynamically select from multiple template types, modify parameters, and even extend the template library as needed, allowing the tool to adapt to different design requirements while maintaining automated operation.
4Manufacturing precision
If existing device generators are used for new design rules, then manufacturing precision cannot be ensured, but attempting to create custom solutions increases device complexity and programming effort
Solution Approach 1:
The patent applies segmentation by separating the device generator into modular components: template definitions, design rule databases, parameter specifications, and generation engines. This modular structure allows custom design rules to be added as separate modules without complicating the entire system, maintaining manufacturing precision through rule-based validation while avoiding overall system complexity.
Data Source
AI summary
Computer-implemented systems and methods for automatically generating an electronic circuit IP block are provided. The disclosed systems and methods maintain the process design rules (DRC Clean), connectivity (LVS Clean) correctness, and obey Reliability Verification (RV) and DFM (Design for Manufacturability) constraints, including time constraints. Exemplary systems and methods may include an electronic circuit layout generator and/or IP generator to obtain manufacturing processes and design rules from an external source, define a type of electronic circuit to be fabricated, prepare a circuit schematic of the defined electronic circuit, and generate an IP block for the defined electronic circuit based on the circuit schematic. A computer program generator is provided to create the defined electronic circuit. A computer readable storage medium contains processing instructions for obtaining the manufacturing processes and design rules and for fabricating the electronic circuit.