Automatic Pipelining Framework for Heterogeneous Parallel Computing

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Solution Overview

Problem

Existing programming frameworks for heterogeneous parallel platforms struggle to exploit pipeline parallelism effectively, making it challenging to tune accelerator code for performance, partition and schedule applications across different processing units, and manage data transfers between distinct memory hierarchies.

Innovation Solution

The method involves automatically partitioning a program into pipeline stages, scheduling tasks onto processing units, estimating execution times, and iteratively refining this process to optimize pipeline structure and mapping across heterogeneous processing units, using techniques like retiming and throughput transformation to improve throughput and reduce programming complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If programmers manually identify and partition pipeline stages using provided APIs, then pipeline parallelism can be exploited, but the programming complexity and memory usage increase significantly

Engineering Contradiction:
Improvepipeline parallelism exploitationVSAvoidprogramming complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system automatically identifies and partitions pipeline stages without requiring programmer intervention. The automatic pipelining framework analyzes the program, identifies candidate stages, determines optimal partitioning, and generates the pipelined code structure autonomously, eliminating the need for manual API usage while still exploiting pipeline parallelism

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The framework performs preliminary analysis of the program to identify pipeline stages and their dependencies before code generation. By pre-determining the optimal partitioning and scheduling strategy, the system prepares the pipeline structure in advance, avoiding the need for programmers to manually specify these details during development

Inventive Principle:
Principle #10Preliminary action

2Productivity

If fine-grained pipeline stages are created to improve throughput, then pipeline parallelism increases, but memory consumption by queues increases

Engineering Contradiction:
ImprovethroughputVSAvoidmemory consumption
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The system dynamically adjusts pipeline stage granularity and queue sizes based on available memory resources and performance requirements. By changing the parameters of stage partitioning and buffer allocation, the framework optimizes the balance between throughput and memory consumption, preventing arbitrary fine-grained partitioning that would exceed memory constraints

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The framework applies selective pipelining only to critical path stages that provide the most performance benefit, rather than uniformly fine-graining all operations. This partial action approach focuses computational parallelism where it matters most while limiting queue creation and memory usage to necessary levels

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If pipeline stages are balanced to maximize throughput, then execution efficiency improves, but the scheduling complexity across heterogeneous processing units increases

Engineering Contradiction:
ImprovethroughputVSAvoidscheduling complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The framework segments the pipeline scheduling problem into independent sub-problems for each processing unit. By dividing the heterogeneous platform into separate scheduling domains and assigning stages to appropriate units based on their capabilities, the system reduces overall scheduling complexity while maintaining throughput optimization through targeted load balancing

Inventive Principle:
Principle #1Segmentation

4Productivity

If automatic pipelining is implemented on heterogeneous platforms, then processor utilization improves, but the complexity of mapping and scheduling tasks increases

Engineering Contradiction:
Improveprocessor utilizationVSAvoidmapping and scheduling complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The framework introduces an automatic pipelining layer that acts as an intermediary between the high-level program specification and the heterogeneous hardware platform. This intermediary automatically handles the complex mapping and scheduling decisions, translating program semantics into optimized pipeline configurations for diverse processing units without requiring programmers to understand underlying complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9122523B2Automatic pipelining framework for heterogeneous parallel computing systems
Publication Date: 2015.09.01 NEC CORP
  • US9122523B2 patent drawing
  • US9122523B2 patent drawing
  • US9122523B2 patent drawing

AI summary

Systems and methods for automatic generation of software pipelines for heterogeneous parallel systems (AHP) include pipelining a program with one or more tasks on a parallel computing platform with one or more processing units and partitioning the program into pipeline stages, wherein each pipeline stage contains one or more tasks. The one or more tasks in the pipeline stages are scheduled onto the one or more processing units, and execution times of the one or more tasks in the pipeline stages are estimated. The above steps are repeated until a specified termination criterion is reached.