Autonomous Threshold Sensor Circuit for CPU-Free Slew Rate Detection
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Solution Overview
Problem
Existing slew rate sensors require significant CPU intervention and resources, leading to inefficiencies and power consumption issues, especially when detecting discrete signal transitions, as they often rely on analog hardware that is space and power intensive, and can miss signal levels due to high CPU-speed ratios.
Innovation Solution
An autonomous sensor system that includes an analog voltage threshold detection circuit, measurement circuit, and state detection circuit, allowing for core-independent operation without CPU supervision, using programmable threshold values to detect and measure slew rates and state changes without interrupting the processing core.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If analog hardware is used for slew rate sensing, then measurement capability is provided, but device complexity and power consumption increase
Solution Approach 1:
The patent replaces analog hardware-based slew rate sensing with a digital implementation using a field-programmable gate array (FPGA). The FPGA performs slew rate measurement through digital logic circuits that sample the input signal and calculate rise/fall times, eliminating the need for complex analog components while maintaining measurement functionality.
Solution Approach 2:
The patent changes the implementation approach from analog parameter measurement to digital parameter processing. By sampling the input signal at defined voltage thresholds (e.g., 10% and 90% of full scale) and measuring the time between samples using FPGA counters, the system transforms continuous analog measurement into discrete digital measurement, reducing hardware complexity.
2Measurement precision
If CPU intervention is used for signal detection, then measurement accuracy is maintained, but processing bandwidth usage increases
Solution Approach 1:
The patent divides the signal detection function into independent modular circuits within the FPGA. Separate logic modules handle rising edge detection, falling edge detection, timing measurement, and output generation. This segmentation allows parallel operation of detection functions without requiring CPU intervention, freeing processing bandwidth while maintaining detection accuracy.
Solution Approach 2:
The FPGA-based sensor performs self-service by autonomously sampling the input signal, comparing it against threshold values, measuring transition times, and generating output signals without CPU supervision. The system includes self-contained logic that automatically initiates measurements, processes results, and updates outputs, eliminating the need for CPU polling or intervention.
3Speed
If high CPU-speed ratios are used for signal sampling, then sampling rate is increased, but signal levels may be missed
Solution Approach 1:
The patent implements preliminary action by pre-configuring the FPGA with defined voltage thresholds (e.g., 10% and 90% of full scale) and pre-loading counter registers with timing values. The sampling and comparison logic is pre-initialized to immediately detect transitions when they occur, ensuring no signal levels are missed even at high speeds. The system is ready to measure before the actual signal transition occurs.
Solution Approach 2:
The FPGA maintains continuous sampling and comparison operations without interruption or CPU intervention. The digital logic continuously monitors the input signal against threshold values, and the timing counters run continuously to capture transition moments. This uninterrupted operation ensures reliable detection of all signal levels regardless of CPU speed or interrupt latency.
4Loss of energy
If autonomous operation is implemented, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The patent merges multiple functions (signal sampling, threshold comparison, timing measurement, result latching, and output generation) into a single integrated FPGA circuit. This consolidation creates an autonomous sensor that operates independently without requiring separate CPU control logic, reducing overall system complexity while enabling power-efficient autonomous operation. The merged circuit handles all measurement tasks within the FPGA's programmable logic resources.
Data Source
AI summary
Disclosed embodiments relate to sensing states and changes of states of a signal and sensors for the same, including but not limited to, autonomous sensors. Such sensor may include an analog signal threshold detection circuit, a state detection circuit, and a measurement circuit. The analog signal threshold detection circuit may be configured to alternately assert and de-assert a threshold detected indication in response to an input signal and a state thereof. The state detection circuit may be configured to generate a signal state indication about a state of the input signal. The measurement circuit may be configured to generate a measurement in response to assertions of the threshold detected indication and the signal state indication, such as a count, a slew rate, or a frequency. In some embodiments, disclosed sensors may have programmable thresholds for sensing the signal states and changes therein.