Data Integrity Verification via Auxiliary CRC Comparison

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Solution Overview

Problem

Current electric flight control systems face challenges in ensuring reliable, secure, and high-speed data transmission between units, particularly in harsh environments like helicopters, where existing solutions like ARINC-429 and 1553 buses are inadequate due to low speeds, poor environmental resistance, and high latency.

Innovation Solution

A method involving the generation and verification of cyclic redundancy codes (CRCs) across multiple units within a single wired link, using the High-Level Data Link Control (HDLC) standard and RS-485 physical interfaces, to ensure data integrity and reliability, while reducing cabling redundancy and costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ARINC-429 bus is used for data transmission, then environmental resistance is improved, but data rate deteriorates (100 kbit/s vs required 15 Mbit/s)

Engineering Contradiction:
Improveenvironmental resistanceVSAvoiddata rate
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent changes the data transmission parameters by using differential voltage signaling with voltage levels of ±5V or ±12V, enabling achievement of at least 15 Mbit/s data rate while maintaining environmental resistance through the differential signaling approach that rejects common-mode interference.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If ARINC-429 bus is used for data transmission, then environmental resistance is improved, but latency deteriorates (significantly worse than ARINC-429's low latency)

Engineering Contradiction:
Improveenvironmental resistanceVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent optimizes transmission parameters including voltage levels, bit timing, and signaling methodology to achieve latency below 50 μs while maintaining robust environmental resistance through differential signaling that immune to lightning and electromagnetic interference.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If redundant cabling is implemented for reliability, then reliability is improved, but weight deteriorates (weight of cabling is paramount)

Engineering Contradiction:
Improvetransmission reliabilityVSAvoidcabling weight
Core Design Contradiction:
ReliabilityVSWeight of moving object

Solution Approach 1:

The patent introduces an intermediary verification mechanism where auxiliary upstream units generate and transmit independent CRC codes through a separate auxiliary downstream unit, enabling single-cable operation with verified integrity, thus eliminating the need for redundant physical cabling while maintaining high reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If data transmission verification is performed through multiple units, then reliability is improved, but device complexity deteriorates

Engineering Contradiction:
Improvedata transmission integrityVSAvoidverification system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses copying by having auxiliary upstream units create copies of the CRC code generated by the main upstream unit, and auxiliary downstream units create copies of received frames for verification, enabling complex verification functionality while reusing existing hardware components and communication infrastructure.

Inventive Principle:
Principle #26Copying

Data Source

PatentEP3224976B1Method for verifying the integrity of data transmission between a main upstream unit and a main downstream unit
Publication Date: 2019.01.02 SAFRAN ELECTRONICS & DEFENSE (FR)
  • EP3224976B1 patent drawingFigure 1
  • EP3224976B1 patent drawingFigure 2
  • EP3224976B1 patent drawingFigure 3a~3b

AI summary

The present invention relates to a method for verifying the integrity of data transmission between a main upstream unit (10a) and a main downstream unit (20a), the method being characterised in that it includes the implementation of the following steps: a data-processing module (11a) of the main upstream unit (10a) generates a first frame (T1) including a packet (P1) of data to be transmitted and a cyclic redundancy code (E1) of said packet (P1); encapsulating the first frame (T1) in a second frame (T2) which also includes a cyclic redundancy code (C1) of the first frame (T1); encapsulating the cyclic redundancy code (E1) of the packet (P1) in a third frame (T3); the data-processing module (11b) of the at least one auxiliary upstream unit (10b) compares each of the cyclic redundancy codes (E1) extracted from the first frame (T1) with those extracted from the third frame (T3); and confirming the integrity of data transmission to the main downstream unit (20a) only if the comparison is positive.