Convolutional Code Decoder Using Auxiliary Data for Faster Viterbi Decoding
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Solution Overview
Problem
In Low-Power Wide-Area Network (LPWAN) systems, devices face increased power consumption due to prolonged computing times required for accurate signal demodulation in poor signal-to-noise ratio environments, which affects bit error rate (BER) performance and battery life.
Innovation Solution
A convolutional code decoder and decoding method that utilizes auxiliary data to facilitate faster demodulation and decoding through error detection and channel coding processes, employing Viterbi decoding with predicted data to reduce unnecessary errors and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the receiving end waits to receive repeatedly transmitted signals to improve demodulation accuracy, then the bit error rate performance is improved, but the power consumption increases
Solution Approach 1:
The patent performs error detection on auxiliary data before full decoding to determine whether full decoding is necessary. This preliminary check avoids unnecessary extended computing time and power consumption when the auxiliary data is already correct, while still ensuring reliable decoding when errors are present.
Solution Approach 2:
The patent uses a two-stage decoding approach: first performing lightweight error detection on auxiliary data, then conditionally performing full Viterbi decoding only when needed. This partial action approach reduces average power consumption by avoiding excessive full decoding operations when not necessary.
2Measurement precision
If the receiving end spends extended computing time to decode repeatedly transmitted signals, then the demodulation accuracy is improved, but the service life of the battery is reduced
Solution Approach 1:
The patent performs error detection on auxiliary data before committing to full decoding operations. This preliminary action enables early termination when the auxiliary data is correct, preserving battery life while maintaining demodulation accuracy when needed.
Solution Approach 2:
The patent dynamically adjusts the decoding strategy based on error detection results. When auxiliary data passes error detection, the system terminates early; when errors are detected, it proceeds to full decoding. This dynamic adaptation optimizes the balance between accuracy and battery life.
3Reliability
If the receiving end performs full decoding operations to ensure correct signal decoding, then the decoding accuracy is improved, but the computing time increases
Solution Approach 1:
The patent performs error detection on auxiliary data as a preliminary step before full decoding. This early check identifies cases where full decoding is unnecessary, reducing computing time while maintaining decoding accuracy for cases that actually require it.
Solution Approach 2:
The patent segments the decoding process into two distinct stages: a lightweight error detection stage on auxiliary data, and a full Viterbi decoding stage only when needed. This segmentation allows the system to quickly handle easy cases while reserving full processing power for difficult cases, optimizing overall computing time.
Data Source
AI summary
The invention discloses a convolutional code decoder and a convolutional code decoding method. The convolutional code decoder and the convolutional code decoding method of the present invention perform decoding using predictive information, and therefore can demodulate/decode signals more quickly. Earlier completion of demodulation/decoding of signals can terminate the operation earlier and thereby achieve the effect of power savings. The convolutional code decoder performs decoding according to received data and auxiliary data to obtain target data, and includes a first error detection data generation circuit, a channel coding circuit, a first selection circuit, a first Viterbi decoding circuit, a second error detection data generation circuit, a comparison circuit, a second selection circuit, and a second Viterbi decoding circuit.