Auxiliary Driving Unit for Semiconductor Memory Latch Circuit

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Solution Overview

Problem

Semiconductor memory apparatuses face long data detection times due to heavy loading of inverters in latch circuits, particularly when driving low voltage logic levels, which affects the efficiency of data transmission.

Innovation Solution

Incorporating auxiliary driving units that connect output nodes to ground voltage based on their logic levels, enhancing the driving force of latch units to reduce data detection time by ensuring quick voltage level differences on data lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If inverters in latch circuits drive low voltage logic levels, then data transmission is enabled, but data detection time increases due to heavy loading

Engineering Contradiction:
Improvedata transmission efficiencyVSAvoiddata detection time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

An auxiliary driving unit is introduced as an intermediary component between the latch circuit and the data line. This auxiliary unit includes a controlling transistor that is activated by a control signal to provide additional driving current specifically when low voltage logic levels need to be transmitted, thereby reducing the detection time without affecting normal operation

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The driving capability of the latch circuit is dynamically changed by activating the auxiliary driving unit only when needed. The control signal adjusts the parameters of the circuit by enabling additional current driving capacity during low voltage logic level transmission, optimizing performance based on the specific operational requirement

Inventive Principle:
Principle #35Parameter changes

2Power

If transistor capacity is increased to improve driving force, then low voltage logic level transmission is improved, but inverter loading increases and detection time lengthens

Engineering Contradiction:
Improvedriving forceVSAvoiddata detection time
Core Design Contradiction:
PowerVSLoss of time

Solution Approach 1:

The driving function is segmented into two parts: the original latch circuit inverters and the auxiliary driving unit. The auxiliary unit is specifically responsible for providing additional driving force during low voltage logic level transmission, while the original inverters maintain their primary latching function, thus avoiding overloading the inverters

Inventive Principle:
Principle #1Segmentation

3Loss of time

If auxiliary driving units are added to enhance driving force, then data detection time is reduced, but device complexity increases

Engineering Contradiction:
Improvedata detection timeVSAvoidcircuit complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The auxiliary driving unit is designed with multi-functionality to minimize its impact on overall circuit complexity. It serves multiple purposes: providing additional driving force for low voltage logic levels, being controlled by existing control signals, and integrating with the existing latch circuit structure without requiring separate independent control mechanisms

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9558829B2System having a semiconductor integrated circuit device
Publication Date: 2017.01.31 SK HYNIX INC
  • US9558829B2 patent drawing
  • US9558829B2 patent drawing
  • US9558829B2 patent drawing

AI summary

A semiconductor memory apparatus including a latch unit configured to be driven in response to activation of a reset selection signal and resetting a first node and a second node; and an auxiliary driving unit configured to support a driving force of the latch unit in response to the reset selection signal and a voltage logic level of the first node or the second node, wherein the first node and the second node have substantially opposite voltage logic levels.